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CAP1028
8 Channel Capacitive Touch Sensor with 2 LED Drivers
PRODUCT FEATURES
General Description
The CAP1028 is a multiple channel Capacitive Touch sensor with multiple power LED drivers. It contains eight (8) individual Capacitive Touch sensor inputs with programmable sensitivity for use in touch sensor applications. Each sensor automatically recalibrates to compensate for gradual environmental changes. The CAP1028 also contains two (2) LED drivers that offer full-on / off, variable rate blinking, dimness controls, and breathing. Each of the LED drivers may be linked to one of the sensors to be actuated when a touch is detected. As well, each LED driver may be individually controlled via a host controller. The CAP1028 offers multiple power states operating at low quiescent currents. During the Standby mode of operation, one or more Capacitive Touch Sensors are active and all LEDs may be used. If a touch is detected, then it will wake the system using the WAKE/SPI_MOSI pin. The Deep Sleep mode of operation is the lowest power state available drawing 3uA of current. During this mode, no sensors are activethough all LEDs may be u s e d . D r i v i n g t h e WA K E / S P I _ M O S I p i n o r communications will wake the device. Datasheet
Applications
Desktop and Notebook PC's LCD Monitors Printers Appliances
Features
Eight (8) Capacitive Touch Sensor Inputs
-- Programmable sensitivity -- Automatic recalibration -- Individual thresholds for each button
Flexible Capacitive Touch Sense algorithm Multiple Communication interfaces
-- -- -- --
SMBus / I2C compliant interface SMSC BC-Link interface SPI communications Pin selectable communications protocol and multiple slave addresses (SMBus / I2C only)
Low Power operation
-- 3uA quiescent current in Deep Sleep -- Samples one or more channels in Standby
Two (2) LED Driver Outputs
-- Open Drain or Push-Pull -- Programmable blink, breathe, and dimness controls -- Can be linked to Capacitive Touch Sensors
Dedicated Wake output flags touches in low power mode System RESET pin Available in 20-pin 4mm x 4mm RoHS compliant QFN package
Block Diagram
LED1 LED2 RESET VDD GND WAKE / SPI_MOSI SPI_CS# SMBus / BCLink / SPI Slave Protocol SMCLK/ BC_CLK / SPI_CLK SMDATA / BC_DATA/ SPI_MSIO / SPI_MISO ALERT# / BC_IRQ# ADDR_COMM
LED Driver, Breathe, and Dimness control
Capacitive Sensing Algorithm
CS1 CS2
CS3 CS4 CS5 CS6 CS7 CS8
Note: I2C is a trademark of NXP semiconductor. BC-Link is a trademark of SMSC.
SMSC CAP1028
DATASHEET
Revision 1.1 (08-05-09)
8 Channel Capacitive Touch Sensor with 2 LED Drivers Datasheet
ORDERING INFORMATION
ORDERING NUMBER CAP1028-1-BP-TR PACKAGE 20-pin QFN 4mm x 4mm (Lead Free RoHS compliant) FEATURES Eight Capacitive Touch Sensors, Two LED drivers, Dedicated Wake, Reset, SMBus / BC-Link / SPI interfaces
REEL SIZE IS 4,000 PIECES
80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123 Copyright (c) 2009 SMSC or its subsidiaries. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC's website at http://www.smsc.com. SMSC is a registered trademark of Standard Microsystems Corporation ("SMSC"). Product names and company names are the trademarks of their respective holders. SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT; TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Revision 1.1 (08-05-09)
2
SMSC CAP1028
DATASHEET
8 Channel Capacitive Touch Sensor with 2 LED Drivers Datasheet
Table of Contents
Chapter 1 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Chapter 2 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Chapter 3 Communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.1 Communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.1 SMBus (I2C) Communications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.2 SPI Communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.3 BC-Link Communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . System Management Bus. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1 SMBus Start Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.2 SMBus Address and RD / WR Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.3 SMBus Data Bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.4 SMBus ACK and NACK Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.5 SMBus Stop Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.6 SMBus Timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.7 SMBus and I2C Compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SMBus Protocols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3.1 SMBus Write Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3.2 Block Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3.3 SMBus Read Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3.4 Block Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3.5 SMBus Send Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3.6 SMBus Receive Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SPI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4.1 SPI Normal Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4.2 SPI Bi-Directional Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4.3 SPI_CS# Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4.4 Address Pointer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4.5 SPI Timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Normal SPI Protocols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5.1 Reset Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5.2 Set Address Pointer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5.3 Write Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5.4 Read Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bi-Directional SPI Protocols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.6.1 Reset Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.6.2 Set Address Pointer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.6.3 Write Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.6.4 Read Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . BC-Link Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 15 15 15 16 16 16 16 16 17 17 17 17 17 18 18 18 18 19 19 20 20 20 20 20 20 21 22 22 23 24 24 24 25 25 25
3.2
3.3
3.4
3.5
3.6
3.7
Chapter 4 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.1 4.2 4.3 4.4 4.5 Power States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RESET Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . WAKE/SPI_MOSI Pin Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . LED Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.4.1 Linking LEDs to Capacitive Touch Sensors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Capacitive Touch Sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5.1 Sensing Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5.2 Recalibrating Sensors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
28 29 29 29 30 30 30 30
SMSC CAP1028
Revision 1.1 (08-05-09)
DATASHEET
8 Channel Capacitive Touch Sensor with 2 LED Drivers Datasheet
4.6
ALERT# Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 4.6.1 Sensor Interrupt Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Chapter 5 Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.1 5.2 Main Status Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Status Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2.1 Sensor Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2.2 LED Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Noise Flag Status Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sensor Delta Count Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sensitivity Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sensor Enable Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sensor Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sensor Configuration 2 Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Averaging and Sampling Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Calibration Activate Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Interrupt Enable Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Repeat Rate Enable Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Multiple Touch Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Recalibration Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sensor Threshold Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sensor Noise Threshold Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.17.1 Sensor Noise Threshold 1 Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.17.2 Sensor Noise Threshold 2 Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Standby Channel Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Standby Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Standby Sensitivity Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Standby Threshold Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sensor Base Count Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . LED Output Type Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sensor LED Linking Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . LED Polarity Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . LED Output Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . LED Behavior Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . LED Pulse 1 Period Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . LED Pulse 2 Period Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . LED Breathe Period Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . LED Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . LED Duty Cycle Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . LED Direct Ramp Rates Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . LED Off Delay Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Product ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Manufacturer ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Revision Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 36 36 36 37 37 38 39 40 40 42 42 44 44 45 46 46 48 48 49 49 49 50 51 52 52 53 53 54 55 56 57 59 60 61 62 63 64 65 65 65
5.3 5.4 5.5 5.6 5.7 5.8 5.9 5.10 5.11 5.12 5.13 5.14 5.15 5.16 5.17
5.18 5.19 5.20 5.21 5.22 5.23 5.24 5.25 5.26 5.27 5.28 5.29 5.30 5.31 5.32 5.33 5.34 5.35 5.36 5.37
Chapter 6 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
6.1 6.2 CAP1028 Package Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 Package Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Chapter 7 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Revision 1.1 (08-05-09)
4
SMSC CAP1028
DATASHEET
8 Channel Capacitive Touch Sensor with 2 LED Drivers Datasheet
List of Figures
Figure 1.1 Figure 3.1 Figure 3.1 Figure 3.1 Figure 3.2 Figure 3.3 Figure 3.4 Figure 3.5 Figure 3.6 Figure 3.7 Figure 3.8 Figure 3.9 Figure 3.10 Figure 4.1 Figure 4.2 Figure 4.3 Figure 5.1 Figure 5.2 Figure 5.3 Figure 5.4 Figure 5.5 Figure 5.6 Figure 6.1 Figure 6.2 Figure 6.3 Figure 6.4 CAP1028 Pin Diagram (20-Pin QFN). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 SMBus Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 SPI Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Example SPI Bus Communication - Normal Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 SPI Reset Interface Command - Normal Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 SPI Set Address Pointer Command - Normal Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 SPI Write Command - Normal Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 SPI Read Command - Normal Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 SPI Read Command - Normal Mode - Full . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 SPI Reset Interface Command - Bi-directional Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 SPI Set Address Pointer Command - Bi-directional Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . 25 SPI Write Data Command - Bi-directional Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 SPI Read Data Command - Bi-directional Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 System Diagram for CAP1028 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Sensor Interrupt Behavior - Repeat Rate Enabled. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Sensor Interrupt Behavior - No Repeat Rate Enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Pulse Behavior with Non-Inverted Polarity. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Pulse Behavior with Inverted Polarity. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Pulse 2 Behavior with Non-Inverted Polarity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Pulse 2 Behavior with Inverted Polarity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Direct Mode Behavior for Non-Inverted Polarity. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Direct Mode Behavior for Inverted Polarity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 20-Pin QFN 4mm x 4mm Package Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 20-Pin QFN 4mm x 4mm Package Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 20-Pin QFN 4mm x 4mm PCB Drawing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 CAP1028 Package Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
SMSC CAP1028
5
Revision 1.1 (08-05-09)
DATASHEET
8 Channel Capacitive Touch Sensor with 2 LED Drivers Datasheet
List of Tables
Table 1.1 Pin Description for CAP1028 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 1.2 Pin Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 2.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 2.2 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 3.1 ADDR_COMM Pin Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 3.2 Protocol Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 3.3 Write Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 3.4 Block Write Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 3.5 Read Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 3.6 Block Read Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 3.7 Send Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 3.8 Receive Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 5.1 Register Set in Hexadecimal Order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 5.2 Main Status Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 5.3 Status Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 5.4 Noise Flag Status Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 5.5 Sensor Delta Count Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 5.6 Sensitivity Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 5.7 DELTA_SENSE Bit Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 5.8 BASE_SHIFT Bit Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 5.9 Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 5.10 Sensor Enable Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 5.11 Sensor Configuration Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 5.12 MAX_DUR Bit Decode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 5.13 RPT_RATE Bit Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 5.14 Sensor Configuration 2 Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 5.15 Averaging and Sampling Configuration Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 5.16 AVG Bit Decode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 5.17 CYCLE_TIME Bit Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 5.18 Calibration Activate Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 5.19 Interrupt Enable Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 5.20 Repeat Rate Enable Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 5.21 Multiple Touch Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Table 5.22 B_MULT_T Bit Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Table 5.23 Recalibration Configuration Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Table 5.24 NEG_DELTA_CNT Bit Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Table 5.25 CAL_CFG Bit Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Table 5.26 Sensor Threshold Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Table 5.27 Sensor Noise Threshold Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Table 5.28 CSx_BN_TH Bit Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Table 5.29 Standby Channel Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Table 5.30 Standby Configuration Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Table 5.31 STBY_AVG Bit Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Table 5.32 STBY_CY_TIME Bit Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Table 5.33 Standby Configuration Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Table 5.34 STBY_SENSE Bit Decode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Table 5.35 Standby Threshold Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Table 5.36 Sensor Base Count Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Table 5.37 LED Output Type Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Table 5.38 Sensor LED Linking Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Table 5.39 LED Polarity Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Table 5.40 LED Output Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
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DATASHEET
8 Channel Capacitive Touch Sensor with 2 LED Drivers Datasheet
Table 5.41 LED Polarity Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 5.42 LED Behavior Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 5.43 LEDx_CTL Bit Decode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 5.44 LED Pulse 1 Period Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 5.45 LED Pulse / Breathe Period Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 5.46 LED Pulse 2 Period Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 5.47 LED Breathe Period Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 5.48 LED Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 5.49 PULSEX_CNT Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 5.50 LED Duty Cycle Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 5.51 LED Duty Cycle Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 5.52 LED Direct Ramp Rates Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 5.53 Rise / Fall Rate and Off Delay Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 5.54 LED Off Delay Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 5.55 Product ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 5.56 Vendor ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 5.57 Revision Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 7.1 Customer Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
55 56 57 57 59 59 60 61 61 62 62 63 63 64 65 65 65 69
SMSC CAP1028
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Revision 1.1 (08-05-09)
DATASHEET
8 Channel Capacitive Touch Sensor with 2 LED Drivers Datasheet
Chapter 1 Pin Description
VDD
CS1
20
19
18
CS2
17
CS3
SPI_CS# WAKE / SPI_MOSI SMDAT / BC_DATA / SPI_MSIO / SPI_MISO SMCLK / BC_CLK / SPI_CLK N/C
1 2 3 4 5 10 6 7 8 9
16 15 14
CS4
CS5 CS6 CS7 CS8 ADDR_COMM
CAP1028 20 pin QFN
13 12 11
GND
LED1
LED2
N/C
RESET
Figure 1.1 CAP1028 Pin Diagram (20-Pin QFN)
Table 1.1 Pin Description for CAP1028 PIN NUMBER 1
PIN NAME SPI_CS#
PIN FUNCTION Active low chip-select for SPI bus WAKE - Active high wake / interrupt output Standby power state
ALERT# / BC_IRQ#
PIN TYPE DI (5V) DO DI DI (5V)
2
WAKE / SPI_MOSI
WAKE - Active high wake input - requires pull-down resistor Deep Sleep power state SPI_MOSI - SPI Master-Out-Slave-In port when used in normal mode
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SMSC CAP1028
DATASHEET
8 Channel Capacitive Touch Sensor with 2 LED Drivers Datasheet
Table 1.1 Pin Description for CAP1028 (continued) PIN NUMBER
PIN NAME
PIN FUNCTION SMDATA - Bi-directional, open-drain SMBus data - requires pull-up resistor
PIN TYPE DIOD (5V) DIO DIO DO DI (5V) DI (5V) DI (5V) n/a OD (5V) DO OD (5V) DO n/a DI (5V) OD (5V) OD (5V) AI AIO AIO AIO AIO AIO AIO AIO AIO Power Power
3
SMDATA / BC_DATA / SPI_MSIO / SPI_MISO
BC_DATA - Bi-directional, open-drain BC-Link data - requires pull-up resistor SPI_MSIO - SPI Master-Slave-In-Out bidirectional port when used in bi-directional mode SPI_MISO - SPI Master-In-Slave-Out port when used in normal mode SMCLK - SMBus clock input - requires pull-up resistor
4
SMCLK / BC_CLK / SPI_CLK N/C LED1
BC_CLK - BC-Link clock input SPI_CLK - SPI clock input
5 6
Not Internally Connected Open drain LED 1 driver (default) Push-pull LED 1 driver Open drain LED 2 driver (default)
7 8 9
LED2 Push-pull LED 2 driver N/C RESET Not Internally Connected Active high soft reset for system - resets all registers to default values. This pin contains an internal 50uA pull-down current. ALERT# - Active low alert / interrupt output usable for SMBus alert or SPI interrupt BC_IRQ# - Active low interrupt / optional for BC-Link
10
ALERT# / BC_IRQ#
11 12 13 14 15 16 17 18 19 20 Bottom Pad
ADDR_COMM CS8 CS7 CS6 CS5 CS4 CS3 CS2 CS1 VDD GND
Address / communications select pin - pull-down resistor determines address / communications mechanism Capacitive Touch Sensor 8 Capacitive Touch Sensor 7 Capacitive Touch Sensor 6 Capacitive Touch Sensor 5 Capacitive Touch Sensor 4 Capacitive Touch Sensor 3 Capacitive Touch Sensor 2 Capacitive Touch Sensor 1 Positive Power supply Ground
The pin types are described in detail below. All pins labeled with (5V) are 5V tolerant.
SMSC CAP1028
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Revision 1.1 (08-05-09)
DATASHEET
8 Channel Capacitive Touch Sensor with 2 LED Drivers Datasheet
APPLICATION NOTE: For the 5V tolerant pins that have a pull-up resistor, the pull-up voltage must not exceed 3.6V when the CAP1028 is unpowered. APPLICATION NOTE: The SPI_CS# pin should be grounded when SMBus, I2C, or BC-Link communications are used.
Table 1.2 Pin Types PIN TYPE Power DI AIO DIOD DESCRIPTION This pin is used to supply power or ground to the device. Digital Input - This pin is used as a digital input. This pin is 5V tolerant. Analog Input / Output -This pin is used as an I/O for analog signals. Digital Input / Open Drain Output- This pin is used as a digital I/O. When it is used as an output, it is open drain and requires a pull-up resistor. This pin is 5V tolerant. Open Drain Digital Output - this pin is used as a digital output. It is open drain and requires a pull-up resistor. This pin is 5V tolerant. Push-pull Digital Output - This pin is used as a digital output and can sink and source current. Push-pull Digital Input / Output - This pin is used as an I/O for digital signals.
OD
DO DIO
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SMSC CAP1028
DATASHEET
8 Channel Capacitive Touch Sensor with 2 LED Drivers Datasheet
Chapter 2 Electrical Specifications
Table 2.1 Absolute Maximum Ratings Voltage on 5V tolerant pins (V5VT_PIN) Voltage on 5V tolerant pins (|V5VT_PIN - VDD|) Note 2.2 Voltage on VDD pin Voltage on any other pin to GND Package Power Dissipation up to TA = 85C for 20 pin QFN (see Note 2.3) Junction to Ambient (JA) (see Note 2.4) Operating Ambient Temperature Range Storage Temperature Range ESD Rating, All Pins, HBM Note 2.1 -0.3 to 5.5 0 to 3.6 -0.3 to 4 -0.3 to VDD + 0.3 0.9 58 -40 to 125 -55 to 150 8000 V V V V W C/W C C V
Stresses above those listed could cause permanent damage to the device. This is a stress rating only and functional operation of the device at any other condition above those indicated in the operation sections of this specification is not implied. For the 5V tolerant pins that have a pull-up resistor, the voltage difference between V5VT_PIN and VDD must never exceed 3.6V. The Package Power Dissipation specification assumes a recommended thermal via design consisting of a 3x3 matrix of 0.3mm (12mil) vias at 1.0mm pitch connected to the ground plane with a 2.5 x 2.5mm thermal landing. Junction to Ambient (JA) is dependent on the design of the thermal vias. Without thermal vias and a thermal landing, the JA is approximately 60C/W including localized PCB temperature increase.
Note 2.2 Note 2.3
Note 2.4
Table 2.2 Electrical Specifications VDD = 3V to 3.6V, TA = 0C to 100C, all Typical values at TA = 27C unless otherwise noted. CHARACTERISTIC SYMBOL MIN TYP MAX UNIT CONDITIONS
DC Power Supply Voltage VDD 3.0 3.3 3.6 V
SMSC CAP1028
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Revision 1.1 (08-05-09)
DATASHEET
8 Channel Capacitive Touch Sensor with 2 LED Drivers Datasheet
Table 2.2 Electrical Specifications (continued) VDD = 3V to 3.6V, TA = 0C to 100C, all Typical values at TA = 27C unless otherwise noted. CHARACTERISTIC Supply Current SYMBOL ISTBY MIN TYP 160 MAX 210 UNIT uA CONDITIONS Standby state active 1 sensor monitored No LED active Default conditions (8 avg, 70ms cycle time) Deep Sleep state active LEDs at 100% or 0% Duty Cycle No communications TA < 85C Average current Capacitive Sensing Active LEDs enabled
IDSLEEP
3
10
uA
IDD
300
500
uA
Capacitive Touch Sensor Maximum Base Capacitance Detectable Capacitive Shift CBASE 50 0.1 LED Drivers Duty Cycle Sinking Current Sourcing Current DUTYLED ISINK ISOURCE 0 100 24 24 % mA mA Programmable VOL = 0.4 VOH = VDD - 0.4 2 pF pF Pad untouched Pad touched
CTOUCH
I/O Pins - SPI_CS#, RESET, WAKE / SPI_MOSI, and ALERT# pins Output Low Voltage Output High Voltage Input High Voltage Input Low Voltage Leakage Current VOL VOH VIH VIL ILEAK VDD 0.4 2.0 0.8 5 0.4 V V V V uA powered or unpowered TA < 85C ISINK_IO = 4mA WAKE pin only ISOURCE_IO = 4mA
SMDATA / BC_DATA / SPI_MSIO / SPI_MISO and SMCLK / BC_CLK / SPI_CLK pins Output Low Voltage Output High Voltage Input High Voltage Input Low Voltage Leakage Current VOL VOH VIH VIL ILEAK VDD 0.4 2.0 0.8 5 0.4 V V V V uA powered or unpowered TA < 85C pull-up voltage < 3.6V ISINK_IO = 8mA ISOURCE_IO = 8mA
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SMSC CAP1028
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8 Channel Capacitive Touch Sensor with 2 LED Drivers Datasheet
Table 2.2 Electrical Specifications (continued) VDD = 3V to 3.6V, TA = 0C to 100C, all Typical values at TA = 27C unless otherwise noted. CHARACTERISTIC SMBus First Communication SYMBOL tSMB MIN TYP MAX 15 SMBus Timing Input Capacitance Clock Frequency Spike Suppression Bus free time Start to Stop Setup Time: Start Setup Time: Stop Data Hold Time Data Setup Time Clock Low Period Clock High Period Clock/Data Fall time Clock/Data Rise time Capacitive Load CIN fSMB tSP tBUF tSU:STA tSU:STP tHD:DAT tSU:DAT tLOW tHIGH tFALL tRISE CLOAD 1.3 0.6 0.6 0.6 0.6 1.3 0.6 300 300 400 BC-Link Timing Clock Period Data Hold Time Data Setup Time Clock Duty Cycle tCLK tHD:DAT tSU:DAT Duty 250 0 30 40 50 SPI Timing Clock Period Clock Low Period Clock High Period Clock Rise / Fall time Data Output Delay Data Setup Time Data Hold Time tP tLOW tHIGH tRISE / tFALL tD:CLK tSU:DAT tHD:DAT 20 20 250 0.4 x tP 0.4 x tP 0.6 x tP 0.6 x tP 0.1 x tP 10 ns ns ns ns ns ns ns 60 ns ns ns % Data must be valid before clock 6 72 10 5 400 50 pF kHz ns us us us us us us us ns ns pF Min = 20+0.1CLOAD ns Min = 20+0.1CLOAD ns per bus line UNIT ms CONDITIONS
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Table 2.2 Electrical Specifications (continued) VDD = 3V to 3.6V, TA = 0C to 100C, all Typical values at TA = 27C unless otherwise noted. CHARACTERISTIC SPI_CS# to SPI_CLK setup time Wake Time SYMBOL tSU:CS tWAKE MIN 0 10 20 TYP MAX UNIT ns us SPI_CS# asserted to CLK assert CONDITIONS
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Chapter 3 Communications
3.1 Communications
The CAP1028 communicates using the 2-wire SMBus or I2C bus, the 2-wire proprietary BC-Link, or the SPI bus. Regardless of communication mechanism, the device functionality remains unchanged. The communications mechanism as well as the SMBus (or I2C) slave address is determined by the resistor connected between the ADDR_COMM pin and ground as shown in Table 3.1.
Table 3.1 ADDR_COMM Pin Decode PULL-DOWN RESISTOR (+/- 5%) <= 47k 56k 68k 82k 100k 120k 150k VDD PROTOCOL USED SPI Communications using Normal 4-wire Protocol Used SPI Communications using BiDirectional 3-wire Protocol Used BC-Link Communications SMBus / I2C SMBus / I2C SMBus / I2C SMBus / I2C SMBUS ADDRESS n/a n/a n/a 0101_100(r/w) 0101_011(r/w) 0101_010(r/w) 0101_001(r/w) 0101_000(r/w)
SMBus / I2C
3.1.1
SMBus (I2C) Communications
When configured to communicate via the SMBus, the CAP1028 supports the following protocols: Send Byte, Receive Byte, Read Byte, and Write Byte. In addition, the device supports I2C formatting for block read and block write protocols.
APPLICATION NOTE: For SMBus/I2C communications, the SPI_CS# pin is not used and should be grounded; any data presented to this pin will be ignored. See Section 3.2 and Section 3.3 for more information on the SMBus bus and protocols respectively.
3.1.2
SPI Communications
When configured to communicate via the SPI bus, the CAP1028 supports both bi-directional 3-wire and normal 4-wire protocols and uses the SPI_CS# pin to enable communications. See Section 3.4 and Section 3.5 for more information on the SPI bus and protocols respectively.
3.1.3
BC-Link Communications
When BC-Link communications are used, the CAP1028 supports the read byte protocol and the write byte protocol.
APPLICATION NOTE: For BC-Link communications, the SPI_CS# pin is not used and should be grounded; any data presented to this pin will be ignored. See Section 3.7 for more information on the BC-Link Bus and protocols respectively.
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APPLICATION NOTE: Upon power up, the CAP1028 will not respond to any communications for up to 15ms. After this time, full functionality is available.
3.2
System Management Bus
The CAP1028 communicates with a host controller, such as an SMSC SIO, through the SMBus. The SMBus is a two-wire serial communication protocol between a computer host and its peripheral devices. A detailed timing diagram is shown in Figure 3.1. Stretching of the SMCLK signal is supported; however, the CAP1028 will not stretch the clock signal.
TLOW
THIGH
THD:STA TSU:STO
SMCLK
THD:STA
TRISE
TFALL
THD:DAT
TSU:DAT
TSU:STA
SMDATA
TBUF
P
S
S - Start Condition
S
P - Stop Condition P
Figure 3.1 SMBus Timing Diagram
3.2.1
SMBus Start Bit
The SMBus Start bit is defined as a transition of the SMBus Data line from a logic `1' state to a logic `0' state while the SMBus Clock line is in a logic `1' state.
3.2.2
SMBus Address and RD / WR Bit
The SMBus Address Byte consists of the 7-bit client address followed by the RD / WR indicator bit. If this RD / WR bit is a logic `0', then the SMBus Host is writing data to the client device. If this RD / WR bit is a logic `1', then the SMBus Host is reading data from the client device. See Table 3.1 for available SMBus addresses.
3.2.3
SMBus Data Bytes
All SMBus Data bytes are sent most significant bit first and composed of 8-bits of information.
3.2.4
SMBus ACK and NACK Bits
The SMBus client will acknowledge all data bytes that it receives. This is done by the client device pulling the SMBus Data line low after the 8th bit of each byte that is transmitted. This applies to both the Write Byte and Block Write protocols. The Host will NACK (not acknowledge) the last data byte to be received from the client by holding the SMBus data line high after the 8th data bit has been sent. For the Block Read protocol, the Host will ACK each data byte that it receives except the last data byte.
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3.2.5
SMBus Stop Bit
The SMBus Stop bit is defined as a transition of the SMBus Data line from a logic `0' state to a logic `1' state while the SMBus clock line is in a logic `1' state. When the CAP1028 detects an SMBus Stop bit, and it has been communicating with the SMBus protocol, it will reset its client interface and prepare to receive further communications.
3.2.6
SMBus Timeout
The CAP1028 includes an SMBus timeout feature. Following a 30ms period of inactivity on the SMBus where the SMCLK pin is held low, the device will timeout and reset the SMBus interface. The timeout function defaults to disabled. It can be enabled by setting the TIMEOUT bit in the Configuration register (see Section 5.6).
3.2.7
SMBus and I2C Compliance
The major difference between SMBus and I2C devices is highlighted here. For complete compliance information refer to the SMBus 2.0 specification. 1. Minimum frequency for SMBus communications is 10kHz. 2. The client protocol will reset if the clock is held low longer than 30ms. 3. The client protocol will reset if both the clock and the data line are high for longer than 150us (idle condition). 4. I2C devices do not support the Alert Response Address functionality (which is optional for SMBus). 5. I2C devices support block read and write differently. I2C protocol allows for unlimited number of bytes to be sent in either direction. The SMBus protocol requires that an additional data byte indicating number of bytes to read / write is transmitted. The CAP1028 supports I2C formatting only.
3.3
SMBus Protocols
The CAP1028 is SMBus 2.0 compatible and supports Send Byte, Read Byte, Block Read, Receive Byte as valid protocols as shown below. The CAP1028 also supports the I2C block read and block write protocols. Finally, it will respond to the Alert Response Address protocol but is not in full compliance. All of the below protocols use the convention in Table 3.2.
Table 3.2 Protocol Format DATA SENT TO DEVICE Data sent DATA SENT TO THE HOST Data sent
3.3.1
SMBus Write Byte
The Write Byte is used to write one byte of data to a specific register as shown in Table 3.3.
Table 3.3 Write Byte Protocol SLAVE ADDRESS YYYY_YYY REGISTER ADDRESS XXh
17
START 1 ->0
WR 0
ACK 0
ACK 0
REGISTER DATA XXh
ACK 0
STOP 0 -> 1
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3.3.2
Block Write
The Block Write is used to write multiple data bytes to a group of contiguous registers as shown in Table 3.4. It is an extension of the Write Byte Protocol.
APPLICATION NOTE: When using the Block Write protocol, the internal address pointer will be automatically incremented after every data byte is received. It will wrap from FFh to 00h.
Table 3.4 Block Write Protocol SLAVE ADDRESS YYYY_YYY REGISTER ADDRESS XXh REGISTER DATA XXh
START 1 ->0 REGISTER DATA XXh
WR 0 REGISTER DATA XXh
ACK 0
ACK 0 REGISTER DATA XXh
ACK 0
ACK 0
ACK 0
... ...
ACK 0
STOP 0 -> 1
3.3.3
SMBus Read Byte
The Read Byte protocol is used to read one byte of data from the registers as shown in Table 3.5.
Table 3.5 Read Byte Protocol
START SLAVE ADDRESS WR ACK REGISTER ADDRESS ACK START CLIENT ADDRESS RD ACK REGISTER DATA NACK STOP
1->0
YYYY_YYY
0
0
XXh
0
1 ->0
YYYY_YYY
1
0
XXh
1
0 -> 1
3.3.4
Block Read
The Block Read is used to read multiple data bytes from a group of contiguous registers as shown in Table 3.6. It is an extension of the Read Byte Protocol.
APPLICATION NOTE: When using the Block Read protocol, the internal address pointer will be automatically incremented after every data byte is received. It will wrap from FFh to 00h.
Table 3.6 Block Read Protocol
START SLAVE ADDRESS WR ACK REGISTER ADDRESS ACK START SLAVE ADDRESS RD ACK REGISTER DATA
1->0
ACK
YYYY_YYY
REGISTER DATA
0
ACK
0
REGISTER DATA
XXh
ACK
0
REGISTER DATA
1 ->0
ACK
YYYY_YYY
...
1
REGISTER DATA
0
NACK
XXh
STOP
0
XXh
0
XXh
0
XXh
0
...
XXh
1
0 -> 1
3.3.5
SMBus Send Byte
The Send Byte protocol is used to set the internal address register pointer to the correct address location. No data is transferred during the Send Byte protocol as shown in Table 3.7.
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Table 3.7 Send Byte Protocol SLAVE ADDRESS YYYY_YYY REGISTER ADDRESS XXh
START 1 -> 0
WR 0
ACK 0
ACK 0
STOP 0 -> 1
3.3.6
SMBus Receive Byte
The Receive Byte protocol is used to read data from a register when the internal register address pointer is known to be at the right location (e.g. set via Send Byte). This is used for consecutive reads of the same register as shown in Table 3.8.
Table 3.8 Receive Byte Protocol SLAVE ADDRESS YYYY_YYY
START 1 -> 0
RD 1
ACK 0
REGISTER DATA XXh
NACK 1
STOP 0 -> 1
3.4
SPI Interface
The SMBus has a predefined packet structure, the SPI does not. The SPI Bus can operate in two modes of operation, normal 4-wire mode and bi-directional 3-wire mode. All SPI commands consist of 8-bit packets set to a specific slave device (identified by the CS pin). The SPI bus will latch data on the rising edge of the clock and the clock and data both idle high. All commands are supported via both operating modes. The supported commands are: Reset Serial interface, set address pointer, write command and read command. Note that all other codes received during the command phase are ignored and have no effect on the operation of the device.
tP tLOW tHIGH
SPI_CLK
tRISE
tFALL
SPI_MSIO or SPI_MOSI or SPI_MISO
tSU:DAT tD:CLK tHD:DAT
Figure 3.1 SPI Timing
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3.4.1
SPI Normal Mode
The SPI Bus can operate in two modes of operation, normal and bi-directional mode. In the normal mode of operation, there are dedicated input and output data lines. The host communicates by sending a command along the CAP1028 SPI_MOSI data line and reading data on the SPI_MISO data line. Both communications occur simultaneously which allows for larger through put of data transactions. All basic transfers consist of two 8 bit transactions from the Master device while the slave device is simultaneously sending data at the current address pointer value. Data writes consist of two or more 8-bit transactions. The host sends a specific write command followed by the data to write the address pointer. Data reads consist of one or more 8-bit transactions. The host sends the specific read data command and continues clocking for as many data bytes as it wishes to receive.
3.4.2
SPI Bi-Directional Mode
In the bi-directional mode of operation, the SPI data signals are combined into the SPI_MSIO line, which is shared for data received by the device and transmitted by the device. The protocol uses a simple handshake and turn around sequence for data communications based on the number of clocks transmitted during each phase. All basic transfers consist of two 8 bit transactions. The first is an 8 bit command phase driven by the Master device. The second is by an 8 bit data phase driven by the Master for writes, and by the CAP1028 for read operations. The auto increment feature of the address pointer allows for successive reads or writes. The address pointer will return to 00h after reaching FFh.
3.4.3
SPI_CS# Pin
The SPI Bus is a single master, multiple slave serial bus. Each slave has a dedicated CS pin (chip select) that the master asserts low to identify that the slave is being addressed. There are no formal addressing options.
3.4.4
Address Pointer
All data writes and reads are accessed from the current address pointer. In both Bi-directional mode and Full Duplex mode, the Address pointer is automatically incremented following every read command or every write command. The address pointer will return to 00h after reaching FFh.
3.4.5
SPI Timeout
The CAP1028 does not detect any timeout conditions on the SPI bus.
3.5
Normal SPI Protocols
When operating in normal mode, the SPI bus internal address pointer is incremented depending upon which command has been transmitted. Multiple commands may be transmitted sequentually so long as the SPI_CS# pin is asserted low. Figure 3.1 shows an example of this operation.
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SPI_CS#
SPI_MOSI
7Ah
7Ah
7Dh
41h
7Eh
66h
7Dh
41h
7Fh
7Fh
7Fh
7Fh
7Fh
7Fh
7Dh
40h
7Fh
7Fh
SPI_MISO
XXh (invalid)
XXh (invalid)
YYh (invalid)
YYh (invalid)
XXh (invalid)
45h
AAh (invalid)
AAh (invalid)
55h (invalid)
66h
AAh
AAh
55h
80h
43h
78h
XXh (invalid)
56h
SPI Address Pointer SPI Data output buffer
00h XXh
41h 45h
42h AAh
41h 55h
41h 66h
42h AAh
43h 55h
44h 80h
45h 43h
46h 78h
40h 80h
40h 56h
Register Address / Data
40h / 56h 41h / 45h 42h / AAh 43h / 55h 44h / 80h 45h / 43h 46h / 78h
40h / 56h 41h / 45h 42h / AAh 43h / 55h 44h / 80h 45h / 43h 46h / 78h Indicates SPI Address pointer incremented
40h / 56h 41h / 66h 42h / AAh 43h / 55h 44h / 80h 45h / 43h 46h / 78h
40h / 56h 41h / 66h 42h / AAh 43h / 55h 44h / 80h 45h / 43h 46h / 78h
40h / 56h 41h / 66h 42h / AAh 43h / 55h 44h / 80h 45h / 43h 46h / 78h
40h / 56h 41h / 66h 42h / AAh 43h / 55h 44h / 80h 45h / 43h 46h / 78h
40h / 56h 41h / 66h 42h / AAh 43h / 55h 44h / 80h 45h / 43h 46h /78h
40h / 56h 41h / 66h 42h / AAh 43h / 55h 44h / 80h 45h / 43h 46h /78h
40h / 56h 41h / 66h 42h / AAh 43h / 55h 44h / 80h 45h / 43h 46h / 78h
40h / 56h 41h / 66h 42h / AAh 43h / 55h 44h / 80h 45h / 43h 46h /78h
Figure 3.1 Example SPI Bus Communication - Normal Mode
3.5.1
Reset Interface
Resets the Serial interface whenever two successive 7Ah codes are received. Regardless of the current phase of the transaction - command or data, the receipt of the successive reset commands resets the Serial communication interface only. All other functions are not affected by the reset operation.
8 Channel Capacitive Touch Sensor with 2 LED Drivers Datasheet
SPI_CS#
SPI_CLK
Master SPDOUT SPI_MOSI
`0'
`1'
`1'
`1'
`1'
`0'
`1'
`0'
`0'
`1'
`1'
`1'
`1'
`0'
`1'
`0'
Reset - 7Ah
Reset - 7Ah
SPI_MISO
Invalid register data
00h - Internal Data buffer empty
Master Drives
Slave Drives
Figure 3.2 SPI Reset Interface Command - Normal Mode
3.5.2
Set Address Pointer
The Set Address Pointer command sets the Address pointer for subsequent reads and writes of data. The pointer is set on the rising edge of the final data bit. At the same time, the data that is to be read is fetched and loaded into the internal output buffer but is not transmitted.
SPI_CS#
SPI_CLK Master SPDOUT SPI_MOSI
`0'
`1'
`1'
`1'
`1'
`1'
`0'
`1'
Register Address
Set Address Pointer - 7Dh
SPI_MISO
Unknown, Invalid Data
Unknown, Invalid Data
Master Drives
Slave Drives
Address pointer set
Figure 3.3 SPI Set Address Pointer Command - Normal Mode
3.5.3
Write Data
The Write Data protocol updates the contents of the register referenced by the address pointer. As the command is processed, the data to be read is fetched and loaded into the internal output buffer but not transmitted. Then, the register is updated with the data to be written. Finally, the address pointer is incremented.
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SPI_CS#
SPI_CLK Master SPDOUT SPI_MOSI
Write Command - 7Eh
Data to Write
SPI_MISO
Unknown, Invalid Data
Old Data at Current Address Pointer
Master Drives
Slave Drives 1. Data written at current address pointer 2. Address pointer incremented
Figure 3.4 SPI Write Command - Normal Mode
3.5.4
Read Data
The Read Data protocol is used to read data from the device. During the normal mode of operation, while the device is receiving data, the CAP1028 is simultaneously transmitting data to the host. For the Set Address commands and the Write Data commands, this data may be invalid and it is recommended that the Read Data command is used.
SPI_CS#
SPI_CLK Master SPDOUT SPI_MOSI `0' `1' `1' `1' `1' `1' `1' `1' `0' `1' `1' `1' `1' `1' `1' `1'
First Read Command - 7Fh
SPI_MISO Invalid, Unknown Data *
Subsequent Read Commands - 7F
Data at Current Address Pointer
Master Drives
Slave Drives
Address Pointer Incremented **
* The first read command after any other command will return invalid data for the first byte. Subsequent read commands will return the data at the Current Address Pointer ** The Address Pointer is incremented 8 clocks after the Read Command has been received. Therefore continually sending Read Commands will result in each command reporting new data. Once Read Commands have been finished, the last data byte will be read during the next 8 clocks for any command
Figure 3.5 SPI Read Command - Normal Mode
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1. Register Read Address updated to Current SPI Read Address pointer
1. Register Read Address incremented = current address pointer + 1
1. Register Read Address updated to Current SPI Read Address pointer. 2. Register Read Address incremented = current address pointer +1 - end result = register address pointer doesn't change
SPI_CS#
SPI_MISO
`0'
`1'
`1'
`1'
`1'
`1'
`1'
`1'
XXh
`0'
`1'
`1'
`1'
`1'
`1'
`1'
`1'
Read Command - 7Fh
Master SPDOUT SPI_MOSI Data at previously set register address = current SPI_CLK address pointer Data at previously set register address = current address pointer (SPI)
Subsequent Read Commands - 7Fh
Data at previously set register address = current address pointer (SPI)
Master Drives 1. Output buffer transmitted = data at previous address 1. Register data loaded into pointer + 1 = current address output buffer = data at current pointer address pointer
Slave Drives Register Data loaded into 1. Register data loaded into Output buffer = data at current output buffer = data at current address pointer + 1 address pointer 1. SPI Read Address Incremented = new current 1. Output buffer transmitted = address pointer data at current address pointer 2. Register Read Address +1 Incremented = current address 1. Output buffer transmitted = 2. Flag set to increment SPI data at previous register pointer +1 Read Address at end of next 8 address pointer + 1 = current clocks address pointer
1. Output buffer transmitted = data at current address pointer +1 2. Flag set to increment SPI Read Address at end of next 8 clocks
Figure 3.6 SPI Read Command - Normal Mode - Full
3.6
3.6.1
Bi-Directional SPI Protocols
Reset Interface
Resets the Serial interface whenever two successive 7Ah codes are received. Regardless of the current phase of the transaction - command or data, the receipt of the successive reset commands resets the Serial communication interface only. All other functions are not affected by the reset operation.
SPI_CS#
SPI_CLK Master SPDOUT SPI_MSIO `0' `1' `1' `1' `1' `0' `1' `0' `0' `1' `1' `1' `1' `0' `1' `0'
Reset - 7Ah
Reset - 7Ah
Figure 3.7 SPI Reset Interface Command - Bi-directional Mode
3.6.2
Set Address Pointer
Sets the address pointer to the register to be accessed by a read or write command. This command overrides the auto-incrementing of the address pointer.
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SPI_CS#
SPI_CLK Master SPDOUT SPI_MSIO `0' `1' `1' `1' `1' `1' `0' `1' Register Address
Set Address Pointer - 7Dh
Figure 3.8 SPI Set Address Pointer Command - Bi-directional Mode
3.6.3
Write Data
Writes data value to the register address stored in the address pointer. Performs auto increment of address pointer after the data is loaded into the register.
SPI_CS#
SPI_CLK Master SPDOUT SPI_MSIO `0' `1' `1' `1' `1' `1' `1' `0'
Register Write Data
Write Command - 7Eh
Figure 3.9 SPI Write Data Command - Bi-directional Mode
3.6.4
Read Data
Reads data referenced by the address pointer. Performs auto increment of address pointer after the data is transferred to the Master.
SPI_CS#
SPI_CLK M aster SPDOUT SPI_M SIO
`0'
`1'
`1'
`1'
`1'
`1'
`1'
`1'
Register Read Data
Read Com and - 7Fh m
M aster Drives Slave Drives Indeterm inate
Figure 3.10 SPI Read Data Command - Bi-directional Mode
3.7
BC-Link Interface
The BC-Link is a proprietary bus developed to allow communication between a host controller device to a companion device. This device uses this serial bus to read and write registers and for interrupt
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processing. The interface uses a data port concept, where the base interface has an address register, data register and a control register, defined in the SMSC's 8051's SFR space. Refer to documentation for the BC-Link comptabile host controller for details on how to access the CAP1028 via the BC-Link Interface.
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Chapter 4 General Description
The CAP1028 is a multiple channel Capacitive Touch sensor with multiple power LED drivers. It contains eight (8) individual Capacitive Touch sensor inputs with programmable sensitivity for use in touch sensor applications. Each sensor automatically recalibrates to compensate for gradual environmental changes. The CAP1028 also contains two (2) low side (or push-pull) LED drivers that offer full-on / off, variable rate blinking, dimness controls, and breathing. Each of the LED drivers may be linked to one of the sensors to be actuated when a touch is detected. As well, each LED driver may be individually controlled via a host controller. Finally, the device contains a dedicated RESET pin to act as a soft reset by the system. The CAP1028 offers multiple power states operating at low quiescent currents during its Deep Sleep state. The device also contains a wake pin (WAKE/SPI_MOSI) output to wake the system when a touch is detected in Standby and to wake the device from Deep Sleep. It can monitor one or more channels while in a lower power state and respond to communications normally. The device communicates with a host controller using the SPI bus, SMSC BC-Link bus, or via SMBus / I2C. The host controller may poll the device for updated information at any time or it may configure the device to flag an interrupt whenever a touch is detected on any sensor. A typical system diagram is shown in Figure 4.1.
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VDD
Embedded Controller
ALERT# / BC_IRQ#
SMCLK / BC_CLK / SPI_CLK
SMDATA / BC_DATA / SPI_MSIO / SPI_MISO
WAKE / SPI_MOSI
ADDR_COMM
3.3V - 5V
SPI_CS#
RESET
3.3V - 5V
LED1 Touch Button Touch Button Touch Button Touch Button CS1
CAP1028
LED2 CS2 Touch Button Touch Button Touch Button Touch Button
CS3
CS4
CS5
CS6
CS7
CS8
Figure 4.1 System Diagram for CAP1028
4.1
Power States
The CAP1028 has three operating states depending on the status of the STBY and DSLEEP bits. When the device transitions between power states, previously detected touches (for inactive channels) are cleared and the status bits reset.
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1. Fully Active - The device is fully active. It is monitoring all active Capacitive Sensor channels and driving all LED channels as defined. 2. Standby - The device is in a lower power state. It will measure a programmable number of channels (as determined by the Standby Channel register - default none). Interrupts will still be generated based on the active channels. The device will still respond to communications normally and can be returned to the Fully Active state of operation by clearing the STBY bit. 3. Deep Sleep - The device is in its lowest power state. It is not monitoring any Capacitive Sensor channels. It can be awakened by SMBus or SPI communications targeting the device (which will cause the DSLEEP bit to be automatically cleared). If the device is not communicating via the 4-wire SPI bus, then during this state of operation, if the WAKE/SPI_MOSI pin is driven high by an external source, the device will clear the DSLEEP bit and return to Fully Active. APPLICATION NOTE: The Deep Sleep state does not change LED drive behavior so it is It is the user's responsibility to ensure that the LEDs are driven to the desired state prior to entering Deep Sleep. This is best achieved by unlinking the LEDs from the sensors and driving the LEDs to the desired state using the LED Output Control register. APPLICATION NOTE: If the CAP1028 is configured to communicate using the BC-Link protocol, the device does not support Deep Sleep.
4.2
RESET Pin
The RESET pin is an active high reset that is driven from an external source. While it is asserted high, all the internal blocks will be held in reset including the communications protocol used. No Capacative Touch sensors will be sampled and the LEDs will not be driven. All configuration settings will be reset to default states (thus waking the device from Deep Sleep) and all readings will be cleared. Once the RESET pin is pulled low, the CAP1028 will begin operation as if a power-on-reset had occurred.
4.3
WAKE/SPI_MOSI Pin Operation
When the CAP1028 is placed in Standby, and is not communicating using the 4-wire SPI protocol,it will assert the WAKE/SPI_MOSI pin when a touch is detected on one of its sampled sensors. The pin will remain asserted until the INT bit has been cleared and then it will be de-asserted. When the CAP1028 is placed in Deep Sleep and it is not commuicating using the 4-wire SPI protocol, the WAKE/SPI_MOSI pin is monitored by the device as an input. If the WAKE/SPI_MOSI pin is driven high by an external source, the CAP1028 will clear the DSLEEP bit. When the device is placed in Deep Sleep, this pin is a High-Z input and must have a pull-down resistor to GND for proper operation.
4.4
LED Drivers
The CAP1028 contains two (2) LED Drivers. Each LED driver can be configured to operate in one of the following modes with either push-pull or open drain drive. Additionally, each LED driver can be linked to the respective Capacitive Touch sensor input. 1. Direct - The LED is configured to be on or off when the corresponding input stimulus is on or off (or inverted). The brightness of the LED can be programmed from full off to full on (default). Additionally, the LED contains controls to individually configure ramping on, off, and turn-off delay. 2. Pulse 1 - The LED is configured to fade ON-OFF-ON a programmable number of times with programmable rate and min / max brightness. This behavior may be actuated when a press is detected, or when a release is detected.
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3. Pulse 2 - The LED is configured to "Breathe" while actuated and then "Pulse" when the sensor is released. 4. Breathe - The LED is configured to fade continuously ON-OFF-ON (i.e. to "Breathe") with a programmable rate and min / max brightness. In addition to these four behaviors, all LED drivers support host initiated LED actuation. All LEDs also have an option to assert the ALERT# pin when the initated behavior has reached its maximum or minimum brightness levels.
4.4.1
Linking LEDs to Capacitive Touch Sensors
All LEDs can be linked to the corresponding Capacitive Touch Sense input channel so that when the sensor detects a touch, the corresponding LED will be actuated at one of the programmed responses.
4.5
Capacitive Touch Sensing
The CAP1028 contains eight (8) independent Capacitive Touch Sensor inputs. Each sensor has dynamic range to detect a change of capacitance due to a touch. Additionally, each sensor can be configured to be automatically and routinely re-calibrated.
4.5.1
Sensing Cycle
Each Capacitive Touch Sensor has controls to be activated and included in the sensing cycle. When the device is active, it automatically initiates a sensing cycle and repeats the cycle every time it finishes. The cycle polls through each active Sensor starting with CS1 and extending through CS8. As each Capacitive Touch Sensor is polled, its measurement is compared against a baseline "not touched" measurement. If the delta measurement is large enough, then a touch is detected and an interrupt generated. The sensing cycle time is programmable (see Section 5.10).
4.5.2
Recalibrating Sensors
Each sensor is regularly recalibrated at an adjustable rate. By default, the recalibration routine stores the average 256 previous measurements and periodically updates the base "Not Touched" setting for the Capacitive Touch Sensor input. It is possible that the device loses sensitivity to a touch. This may happen as a result of a noisy environment, an accidental recalibration during a touch, or other environmental changes. When this occurs, then the base untouched sensor may generate negative delta count values. The device will detect this condition based on a programmable number of consecutive negative delta readings. When it detects the condition, the CAP1028 will automatically re-calibrate the base-count settings. During this recalibration, the device will not respond to touches.
4.6
ALERT# Pin
The ALERT# pin is an active low output that is driven when an interrupt event is detected. Whenever an interrupt is generated, the INT bit (see Section 5.1) is set. The ALERT# pin is cleared when INT bit is cleared by the user. Additionally, when the INT bit is cleared by the user, status bits are only cleared if no touch is detected.
4.6.1
Sensor Interrupt Behavior
The sensor interrupts are generated in one of two ways: 1. An interrupt is generated when a touch is detected and when a release is detected (see Figure 4.3).
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2. If the repeat rate is enabled (see Section 5.6), then, so long as the touch is held, another interrupt will be generated based on the programmed repeat rate (see Figure 4.2). When the repeat rate is enabled, the device uses an additional control called MPRESS that determines whether a touch is flagged as a simple "touch" or a "press and hold". The MPRESS[3:0] bits set a minimum press timer. When the button is touched the timer begins. If the sensor is released before the minimum press timer expires, then it is flagged as a touch and an interrupt is generated upon the release. If the sensor detects a touch for longer than this timer value, then it is flagged as a "press and hold" event. So long as the touch is held, interrupts will be generated at the programmed repeat rate and upon a release.
Interrupt on Touch Touch Detected
Polling Cycle (35ms) Interrupt on Release Button Repeat Rate (175ms) Button Repeat Rate (175ms) Button Repeat Rate (175ms)
ALERT Pin / INT bit
Button Status
SMBus Write to INT bit
Figure 4.2 Sensor Interrupt Behavior - Repeat Rate Enabled APPLICATION NOTE: The host may need to poll the device twice to determine that a release has been detected.
Interrupt on Touch
Polling Cycle (35ms) Interrupt on Release
Touch Detected ALERT Pin / INT bit Button Status SMBus Write to INT bit
Figure 4.3 Sensor Interrupt Behavior - No Repeat Rate Enabled
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Chapter 5 Register Description
The registers shown in Table 5.1 are accessible through the communications protocol. An entry of `-' indicates that the bit is not used and will always read `0'.
Table 5.1 Register Set in Hexadecimal Order REGISTER ADDRESS 00h 03h 04h 0Ah 10h 11h 12h 13h 14h 15h 16h 17h 1Fh DEFAULT VALUE 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 2Fh
R/W R/W R R R R R R R R R R R R/W
REGISTER NAME Main Status Control Sensor Status LED Status Noise Flag Status Sensor 1 Delta Count Sensor 2 Delta Count Sensor 3 Delta Count Sensor 4 Delta Count Sensor 5 Delta Count Sensor 6 Delta Count Sensor 7 Delta Count Sensor 8 Delta Count Sensitivity Control
FUNCTION Controls general power states and power dissipation Returns the state of the sampeld Capacative Touch Sensor Stores status bits for LEDs Stores the noise flags for sensors Stores the delta count for CS1 Stores the delta count for CS2 Stores the delta count for CS3 Stores the delta count for CS4 Stores the delta count for CS5 Stores the delta count for CS6 Stores the delta count for CS7 Stores the delta count for CS8 Controls the sensitivity of the threshold and delta counts and data scaling of the base counts Controls general functionality and LED controls Controls whether the Capacitive Touch Sensor inputs are sampled Controls reset delay and auto-repeat delay for sensors operating in the full power state Controls the MPRESS controls for all sensors Controls averaging and sampling window Activates manual re-calibration for Capacative Touch Sensors Enables Interrupts associated with Capacative Touch Sensors
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20h 21h
R/W R/W
Configuration Sensor Enable
20h FFh
Page 39 Page 40
22h
R/W
Sensor Configuration Sensor Configuration 2 Averaging and Sampling Config Calibration Activate Interrupt Enable
A4h
Page 40
23h 24h 26h 27h
R/W R/W R/W R/W
07h 1Dh FFh FFh
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Table 5.1 Register Set in Hexadecimal Order (continued) REGISTER ADDRESS 28h DEFAULT VALUE FFh
R/W R/W
REGISTER NAME Repeat Rate Enable Multiple Press Configuration Recalibration Configuration Sensor 1 Threshold
FUNCTION Enables repeat rate for Capacative Touch Sensors Determines the number of simultaneous touches to flag a multiple touch condition Determines re-calibration timing and sampling window Stores the delta count threshold to determine a touch for Capacitive Touch Sensor 1 Stores the delta count threshold to determine a touch for Capacitive Touch Sensor 2 Stores the delta count threshold to determine a touch for Capacitive Touch Sensor 3 Stores the delta count threshold to determine a touch for Capacitive Touch Sensor 4 Stores the delta count threshold to determine a touch for Capacitive Touch Sensor 5 Stores the delta count threshold to determine a touch for Capacitive Touch Sensor 6 Stores the delta count threshold to determine a touch for Capacitive Touch Sensor 7 Stores the delta count threshold to determine a touch for Capacitive Touch Sensor 8 Stores controls for selecting the noise threshold for sensors 1 - 4 Stores controls for selecting the noise threshold for sensors 5 - 8
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2Ah
R/W
80h
Page 46
2Fh
R/W
8Bh
Page 46
30h
R/W
40h
Page 48
31h
R/W
Sensor 2 Threshold
40h
Page 48
32h
R/W
Sensor 3 Threshold
40h
Page 48
33h
R/W
Sensor 4 Threshold
40h
Page 48
34h
R/W
Sensor 5 Threshold
40h
Page 48
35h
R/W
Sensor 6 Threshold
40h
Page 48
36h
R/W
Sensor 7 Threshold
40h
Page 48
37h
R/W
Sensor 8 Threshold Sensor Noise Threshold 1 Sensor Noise Threshold 2
40h
Page 48
38h 39h
R/W R/W
55h 55h
Page 48 Page 48
Standby Configuration Registers 40h 41h 42h 43h R/W R/W R/W R/W Standby Channel Standby Configuration Standby Sensitivity Standby Threshold Controls which sensors are enabled while in standby Controls averaging and cycle time while in standby Controls sensitivity settings used while in standby Stores the touch detection threshold for active sensors in standby 00h 1Dh 02h 40h Page 49 Page 50 Page 51 Page 52
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Table 5.1 Register Set in Hexadecimal Order (continued) REGISTER ADDRESS 50h 51h 52h 53h 54h 55h 56h 57h 71h 72h 73h 74h 81h 84h 85h 86h 88h 90h DEFAULT VALUE C8h C8h C8h C8h C8h C8h C8h C8h 00h 00h 00h 00h 00h 20h 14h 5Dh 04h F0h
R/W R R R R R R R R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
REGISTER NAME Sensor 1 Base Count Sensor 2 Base Count Sensor 3 Base Count Sensor 4 Base Count Sensor 5 Base Count Sensor 6 Base Count Sensor 7 Base Count Sensor 8 Base Count LED Output Type Sensor LED Linking LED Polarity LED Output Control LED Behavior 1 LED Pulse 1 Period LED Pulse 2 Period LED Breathe Period LED Config LED Pulse 1 Duty Cycle LED Pulse 2 Duty Cycle LED Breathe Duty Cycle LED Direct Duty Cycle
FUNCTION Stores the reference count value for sensor 1 Stores the reference count value for sensor 2 Stores the reference count value for sensor 3 Stores the reference count value for sensor 4 Stores the reference count value for sensor 5 Stores the reference count value for sensor 6 Stores the reference count value for sensor 7 Stores the reference count value for sensor 8 Controls the output type for the LED outputs Controls linking of sensors to LED channels Controls the output polarity of LEDs Controls the output state of the LEDs Controls the behavior and response of LEDs 1 - 2 Controls the period of each breathe during a pulse Controls the period of the breathing during breathe and pulse operation Controls the period of an LED breathe operation Controls LED configuration Determines the min and max duty cycle for the pulse operation Determines the min and max duty cycle for breathe and pulse operation Determines the min and max duty cycle for the breathe operation Determines the min and max duty cycle for Direct mode LED operation
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91h
R/W
F0h
Page 62
92h 93h
R/W R/W
F0h F0h
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Table 5.1 Register Set in Hexadecimal Order (continued) REGISTER ADDRESS 94h 95h FDh FEh FFh DEFAULT VALUE 00h 00h 42h 5Dh 81h
R/W R/W R/W R R R
REGISTER NAME LED Direct Ramp Rates LED Off Delay Product ID Manufacturer ID Revision
FUNCTION Determines the rising and falling edge ramp rates of the LEDs Determines the off delay for all LED behaviors Stores a fixed value that identifies each product Stores a fixed value that identifies SMSC Stores a fixed value that represents the revision number
PAGE Page 63 Page 64 Page 65 Page 65 Page 65
During Power-On-Reset (POR), the default values are stored in the registers. A POR is initiated when power is first applied to the part and the voltage on the VDD supply surpasses the POR level as specified in the electrical characteristics. Any reads to undefined registers will return 00h. Writes to undefined registers will not have an effect.
5.1
Main Status Control Register
Table 5.2 Main Status Control Register
ADDR 00h
R/W R/W
REGISTER Main Status Control
B7 -
B6 -
B5 STBY
B4 DSLEEP
B3 -
B2 -
B1 -
B0 INT
DEFAULT 00h
The Main Status and Control register controls the primary power state of the device. Bit 5 - STBY - Enables Standby. `0' (default) - Sensor scanning is active and LEDs are functional. `1' - Capacitive Touch Sensor scanning is limited to the sensors set in the Standby Channel register (see Section 5.18). The status registers will not be cleared until read. LEDs that are linked to Capacitive Touch sensors will remain linked and active. Sensors that are no longer sampled will flag a release and then remain in a non-touched state. LEDs that are manually controlled will be unaffected. Bit 4 - DSLEEP - Enables Deep Sleep by deactivating all functions. This bit will be cleared when the WAKE pin is driven high or when SPI or SMBus are received targeting the CAP1028. If the CAP1028 is configured to communicate using the BC-Link protocol, then this bit is ignored. `0' (default) - Sensor scanning is active and LEDs are functional. `1' - All sensor scanning is disabled and all LEDs are disabled. The status registers are automatically cleared and the INT bit is cleared. Bit 0 - INT - Indicates that there is an interrupt. This bit is only set if the ALERT# pin has been asserted. If a channel detects a touch and its associated interrupt enable bit is not set to a logic `1' then no action is taken. This bit is cleared by writing a logic `0' to it. When this bit is cleared, the ALERT# pin will be deasserted and all status registers will be cleared if the condition has been removed. If the WAKE/SPI_MOSI pin
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is asserted as a result of a touch detected while in Standby, it will likewise be deasserted when this bit is cleared. Note that this pin is not driven when communicating via the 4-wire SPI protocol `0' - No interrupt pending. `1' - A touch has been detected on one or more channels and the interrupt has been asserted.
5.2
Status Registers
Table 5.3 Status Registers
ADDR
03h 04h
R/W
R R
REGISTER
Sensor Status LED Status
B7
CS8 -
B6
CS7 -
B5
CS6 -
B4
CS5 -
B3
CS4 -
B2
CS3 -
B1
CS2 LED2_ DN
B0
CS1 LED1_ DN
DEFAULT
00h 00h
The Sensor Status Registers store status bits that indicate a touch has been detected. A value of `0' in any bit indicates that no touch has been detected. A value of `1' in any bit indicates that a touch has been detected. All status bits are cleared when the device enters the Deep Sleep (DSLEEP = `1' - see Section 5.1). All status bits are cleared when the INT bit is cleared and if a touch on the respective Capacitive Touch Sensor is no longer present. If a touch is still detected, then the bits will not be cleared (but this will not cause the interrupt to be asserted - see Section 5.6).
5.2.1
Sensor Status
Bit 7 - CS8 - Indicates that a touch was detected on Sensor 8. Bit 6 - CS7 - Indicates that a touch was detected on Sensor 7. Bit 5 - CS6 - Indicates that a touch was detected on Sensor 6. Bit 4 - CS5 - Indicates that a touch was detected on Sensor 5. Bit 3 - CS4 - Indicates that a touch was detected on Sensor 4. Bit 2 - CS3 - Indicates that a touch was detected on Sensor 3. Bit 1 - CS2 - Indicates that a touch was detected on Sensor 2. This sensor can be linked to LED2. Bit 0 - CS1 - Indicates that a touch was detected on Sensor 1. This sensor can be linked to LED1.
5.2.2
LED Status
Bit 1 - LED2_DN - Indicates that LED2 has finished its ramping behavior as determined by the LED2_CTL bits. Bit 0 - LED1_DN - Indicates that LED1 has finished its ramping behavior as determined by the LED1_CTL bits.
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5.3
Noise Flag Status Registers
Table 5.4 Noise Flag Status Registers
ADDR
0Ah
R/W
R
REGISTER
Noise Flag Status
B7
CS8_ NOISE
B6
CS7_ NOISE
B5
CS6_ NOISE
B4
CS5_ NOISE
B3
CS4_ NOISE
B2
CS3_ NOISE
B1
CS2_ NOISE
B0
CS1_ NOISE
DEFAULT
00h
The Noise Flag Status registers store status bits that are generated from the analog block if the detected noise is above the operating region of the analog detector. These bits indicate that the most recently received data from the sensor is invalid and should not be used for touch detection. Furthermore, so long as the bit is set for a particular channel, no decisions are made with the data. A touch is not detected, and a release is not detected. These bits are not sticky and will be cleared automatically if the analog block does not report a noise error.
5.4
Sensor Delta Count Registers
Table 5.5 Sensor Delta Count Registers
ADDR 10h 11h 12h 13h 14h 15h 16h 17h
R/W R R R R R R R R
REGISTER Sensor 1 Delta Count Sensor 2 Delta Count Sensor 3 Delta Count Sensor 4 Delta Count Sensor 5 Delta Count Sensor 6 Delta Count Sensor 7 Delta Count Sensor 8 Delta Count
B7 Sign Sign Sign Sign Sign Sign Sign Sign
B6 64 64 64 64 64 64 64 64
B5 32 32 32 32 32 32 32 32
B4 16 16 16 16 16 16 16 16
B3 8 8 8 8 8 8 8 8
B2 4 4 4 4 4 4 4 4
B1 2 2 2 2 2 2 2 2
B0 1 1 1 1 1 1 1 1
DEFAULT 00h 00h 00h 00h 00h 00h 00h 00h
The Sensor Delta Count registers store the delta count that is compared against the threshold used to determine if a touch has been detected. The count value represents a change in input due to the capacitor associated with a touch on one of the sensors and is referenced to a calibrated base "Not touched" count value. The delta is an instantaneous change and is updated once per sensor per sensing cycle (see Section 4.5.1 - sensor cycle). The value presented is a standard 2's complement number. In addition, the value is capped at a value of 7Fh. A reading of 7Fh indicates that the sensitivity settings are too high and should be adjusted accordingly (see Section 5.5).
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The value is also capped at a negative value of FFh for negative delta counts which may result upon a release.
5.5
Sensitivity Control Register
Table 5.6 Sensitivity Control Register
ADDR 1Fh
R/W R/W
REGISTER Sensitivity Control
B7 -
B6
B5
B4
B3
B2
B1
B0
DEFAULT 2Fh
DELTA_SENSE[2:0]
BASE_SHIFT[3:0]
The Sensitivity Control register controls the sensitivity of a touch detection. Bits 6- 4 DELTA_SENSE[2:0] - Controls the sensitivity of a touch detection. The sensitivity settings act to scale the relative delta count value higher or lower based on the system parameters. A setting of 000b is the most sensitive while a setting of 111b is the least sensitive. At the more sensitive settings, touches are detected for a smaller delta C corresponding to a "lighter" touch. These settings are more sensitive to noise however and a noisy environment may flag more false touches than higher sensitivity levels. APPLICATION NOTE: A value of 128x is the most sensitive setting available. At the most sensitivity settings, the MSB of the Delta Count register represents 64 out of ~25,000 which corresponds to a touch of approximately 0.25% of the base capacitance (or a C of 25fF from a 10pF base capacitance). Conversely a value of 1x is the least sensitive setting available. At these settings, the MSB of the Delta Count register corresponds to a delta count of 8192 counts out of ~25,000 which corresponds to a touch of approximately 33% of the base capacitance (or a C of 3.33pF from a 10pF base capacitance).
Table 5.7 DELTA_SENSE Bit Decode DELTA_SENSE[2:0] 2 0 0 0 0 1 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 SENSITIVITY MULTIPLIER 128x (most sensitive) 64x 32x (default) 16x 8x 4x 2x 1x - (least sensitive)
Bits 3 - 0 - BASE_SHIFT[3:0] - Controls the scaling and data presentation of the Base Count registers. The higher the value of these bits, the larger the range and the lower the resolution of the data presented. The scale factor represents the multiplier to the bit-weighting presented in these register descriptions. APPLICATION NOTE: The BASE_SHIFT[3:0] bits normally do not need to be updated. These settings will not affect touch detection or sensitivity. These bits are sometimes helpful in analyzing the Cap Sensing board performance and stability.
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Table 5.8 BASE_SHIFT Bit Decode BASE_SHIFT[3:0] 3 0 0 0 0 0 0 0 0 1 2 0 0 0 0 1 1 1 1 0 All others 1 0 0 1 1 0 0 1 1 0 0 0 1 0 1 0 1 0 1 0 DATA SCALING FACTOR 1x 2x 4x 8x 16x 32x 64x 128x 256x 256x (default = 1111b)
5.6
Configuration Register
Table 5.9 Configuration Register
ADDR 20h
R/W R/W
REGISTER Configuration
B7 TIMEOUT
B6 WAKE_ CFG
B5 BLK_ DIG_ NOISE
B4 BLK_ ANA_ NOISE
B3 MAX_DUR_ EN
B2 -
B1 -
B0 -
DEFAULT 20h
The Configuration register controls general global functionality that affects the entire device. Bit 7 - TIMEOUT - Enables the timeout and idle functionality of the SMBus protocol. `0' (default) - The SMBus timeout and idle functionality are disabled. The SMBus interface will not time out if the clock line is held low. Likewise, it will not reset if both the data and clock lines are held high for longer than 150us. This is used for I2C compliance. `1' - The SMBus timeout and idle functionality are enabled. The SMBus interface will time out if the clock line is held low for longer than 30ms. Likewise, it will reset if both the data and clock lines are held high for longer than 150us. Bit 6 - WAKE_CFG - Configures the operation of the WAKE pin. `0' (default) - The WAKE pin is not asserted when a touch is detected while the device is in Standby. It will still be used to wake the device from Deep Sleep when driven high. `1' - The WAKE pin will be asserted high when a touch is detected while the device is in Standby. It will also be used to wake the device from Deep Sleep when driven high. Bit 5 - BLK_DIG_NOISE - Determines whether the digital noise threshold is used by the device. `0' - The digital noise threshold is used. If a delta count value exceeds the noise threshold but does not exceed the touch threshold, then the sample is discarded and not used for the automatic recalibration routine.
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`1' (default) - The noise threshold is not used. Any delta count that is less than the touch threshold is used for the automatic re-calibration routine. Bit 4 - BLK_ANA_NOISE - Determines whether the analog noise flag setting will block a touch detection as well as the analog calibration routine. `0' (default) - If the analog noise bit is set, then a touch is blocked on the corresponding channel and will force the analog calibration routine to retry. `1' - A touch is not blocked even if the analog noise bit is set. Likewise, the analog calibration routine will not retry if the analog noise bit is set. Bit 3 - MAX_DUR_EN - Determines whether the maximum duration recalibration is enabled for nongrouped sensors. `0' (default) - The maximum duration recalibration functionality is disabled. A touch may be held indefinitely and no re-calibration will be performed on any sensor. `1' - The maximum duration recalibration functionality is enabled. If a touch is held for longer than the MAX_DUR bit settings, then the re-calibration routine will be restarted (see Section 5.8).
5.7
Sensor Enable Registers
Table 5.10 Sensor Enable Registers
ADDR 21h
R/W R/W
REGISTER Sensor Enable
B7 CS8_EN
B6 CS7_EN
B5 CS6_EN
B4 CS5_EN
B3 CS4_EN
B2 CS3_EN
B1 CS2_EN
B0 CS1_EN
DEFAULT FFh
The Sensor Enable registers determine whether a Capacitive Touch Sensor input is included in the sampling cycle. The length of the sampling cycle is not affected by the number of sensors measured. Bit 7 - CS8_EN - Enables the CS8 input to be included during the sampling cycle. `0' - The CS8 input is not included in the sampling cycle. `1' (default) - The CS8 input is included in the sampling cycle. Bit 6 - CS7_EN - Enables the CS7 input to be included during the sampling cycle. Bit 5 - CS6_EN - Enables the CS6 input to be included during the sampling cycle. Bit 4 - CS5_EN - Enables the CS5 input to be included during the sampling cycle. Bit 3 - CS4_EN - Enables the CS4 input to be included during the sampling cycle. Bit 2 - CS3_EN - Enables the CS3 input to be included during the sampling cycle. Bit 1 - CS2_EN - Enables the CS2 input to be included during the sampling cycle. Bit 0 - CS1_EN - Enables the CS1 input to be included during the sampling cycle.
5.8
Sensor Configuration Register
Table 5.11 Sensor Configuration Register
ADDR 22h
R/W R/W
REGISTER Sensor Configuration
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT A4h
MAX_DUR[3:0]
RPT_RATE[3:0]
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The Sensor Configuration Register controls timings associated with the Capacitive Sensor channels 1 - 8. Bits 7 - 4 - MAX_DUR[3:0] - (default 1010b) - Determines the maximum time that a sensor is allowed to be touched until the Capacitive Touch sensor is recalibrated as shown in Table 5.12.
Table 5.12 MAX_DUR Bit Decode MAX_DUR[3:0] 3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 TIME BEFORE RECALIBRATION 560ms 840ms 1120ms 1400ms 1680ms 2240ms 2800ms 3360ms 3920ms 4480ms 5600ms 6720ms 7840ms 8906ms 10080ms 11200ms
Bits 3 - 0 - RPT_RATE[3:0] - (default 0100b) Determines the time duration between interrupt assertions when auto repeat is enabled. The resolution is 35ms the range is from 35ms to 560ms as shown in Table 5.13.
Table 5.13 RPT_RATE Bit Decode RPT_RATE[3:0] OR M_PRESS[3:0] 3 0 0 0 0 0
SMSC CAP1028
2 0 0 0 0 1
1 0 0 1 1 0
41
0 0 1 0 1 0
INTERRUPT REPEAT RATE OR M_PRESS TIME 35ms 70ms 105ms 140ms 175ms
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Table 5.13 RPT_RATE Bit Decode (continued) RPT_RATE[3:0] OR M_PRESS[3:0] 3 0 0 0 1 1 1 1 1 1 1 1 2 1 1 1 0 0 0 0 1 1 1 1 1 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 INTERRUPT REPEAT RATE OR M_PRESS TIME 210ms 245ms 280ms 315ms 350ms 385ms 420ms 455ms 490ms 525ms 560ms
5.9
Sensor Configuration 2 Register
Table 5.14 Sensor Configuration 2 Register
ADDR 23h
R/W R/W
REGISTER Sensor Configuration 2
B7 -
B6 -
B5 -
B4 -
B3
B2
B1
B0
DEFAULT 07h
M_PRESS[3:0]
Bits 3- 0 - M_PRESS[3:0] - (default 0111b) - Determines the minimum amount of time that sensors configured to use auto repeat must detect a sensor touch to detect a "press and hold" event. If the sensor detects a touch for longer than the M_PRESS[3:0] settings, then a "press and hold" event is detected. This is the maximum amount of time that sensors can detect a sensor touch to differentiate between a "touch" and a "press and hold". If a sensor detects a touch for less than or equal to the M_PRESS[3:0] settings, then a touch event is detected. The resolution is 35ms the range is from 35ms to 560ms as shown in Table 5.13.
5.10
Averaging and Sampling Configuration Register
Table 5.15 Averaging and Sampling Configuration Register
ADDR 24h
R/W R/W
REGISTER Averaging and Sampling Config
B7
B6
B5
B4 AVG[2:0]
B3
B2 SAMP_ TIME
B1
B0
DEFAULT 1Dh
CYCLE_TIME [1:0]
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The Averaging and Sampling Configuration register controls the number of samples taken and the total sensor cycle time for all active sensors while the device is functioning normally. Bits 5 - 3 - AVG[2:0] - Determines the number of samples that are taken for all active channels during the sensor cycle as shown in Table 5.16. All samples are taken consecutively on the same channel before the next channel is sampled and the result is averaged over the number of samples measured before updating the measured results. For example, if CS1, CS2, and CS3 are sampled during the sensor cycle, and the AVG[2:0] bits are set to take 4 samples per channel, then the full sensor cycle will be: CS1, CS1, CS1, CS1, CS2, CS2, CS2, CS2, CS3, CS3, CS3, CS3.
Table 5.16 AVG Bit Decode AVG[2:0] 2 0 0 0 0 1 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 NUMBER OF SAMPLES TAKEN PER MEASUREMENT 1 2 4 8 (default) 16 32 64 128
Bit 2 - SAMP_TIME - Determines the time to take a single sample. `0' - The sampling time is ~2.56ms. `1' (default) - The sampling time is ~1.28ms. Bits 1 - 0 - CYCLE_TIME[1:0] - Determines the overall cycle time for all measured channels during normal operation as shown in Table 5.17. All measured channels are sampled at the beginning of the cycle time. If additional time is remaining, then the device is placed into a lower power state for the remaining duration of the cycle.
Table 5.17 CYCLE_TIME Bit Decode CYCLE_TIME[1:0] 1 0 0 1 1 0 0 1 0 1 OVERALL CYCLE TIME 35ms 70ms (default) 105ms 140ms
APPLICATION NOTE: The programmed cycle time is only maintained if the total averaging time for all samples is less than the programmed cycle. The AVG[2:0] bits will take priority so that if more samples
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are required than would normally be allowed during the cycle time, the cycle time will be extended as necessary to accommodate the number of samples to be measured.
5.11
Calibration Activate Registers
Table 5.18 Calibration Activate Registers
ADDR 26h
R/W R/W
REGISTER Calibration Activate
B7 CS8_CAL
B6 CS7_CAL
B5 CS6_CAL
B4 CS5_CAL
B3 CS4_CAL
B2 CS3_CAL
B1 CS2_CAL
B0 CS1_CAL
DEFAULT FFh
The Calibration Activate register force the respective sensors to be re-calibrated. When a bit is set, the corresponding Capacitive Touch Sensor will be re-calibrated and the bit will be automatically cleared once the re-calibration routine has finished. During the re-calibration routine, the sensors will not detect a press for up to 600ms and the Sensor Base Count register values will be invalid. During this time, any press on the corresponding sensors will invalidate the re-calibration. Bit 7 - CS8_CAL - When set, the CS8 input is re-calibrated. This bit is automatically cleared once the sensor has been re-calibrated successfully. Bit 6 - CS7_CAL - When set, the CS7 input is re-calibrated. This bit is automatically cleared once the sensor has been re-calibrated successfully. Bit 5 - CS6_CAL - When set, the CS6 input is re-calibrated. This bit is automatically cleared once the sensor has been re-calibrated successfully. Bit 4 - CS5_CAL - When set, the CS5 input is re-calibrated. This bit is automatically cleared once the sensor has been re-calibrated successfully. Bit 3 - CS4_CAL - When set, the CS4 input is re-calibrated. This bit is automatically cleared once the sensor has been re-calibrated successfully. Bit 2 - CS3_CAL - When set, the CS3 input is re-calibrated. This bit is automatically cleared once the sensor has been re-calibrated successfully. Bit 1 - CS2_CAL - When set, the CS2 input is re-calibrated. This bit is automatically cleared once the sensor has been re-calibrated successfully. Bit 0 - CS1_CAL - When set, the CS1 input is re-calibrated. This bit is automatically cleared once the sensor has been re-calibrated successfully.
5.12
Interrupt Enable Register
Table 5.19 Interrupt Enable Register
ADDR 27h
R/W R/W
REGISTER Interrupt Enable
B7 CS8_ INT_EN
B6 CS7_ INT_EN
B5 CS6_ INT_EN
B4 CS5_ INT_EN
B3 CS4_ INT_EN
B2 CS3_ INT_EN
B1 CS2_ INT_EN
B0 CS1_ INT_EN
DEFAULT FFh
The Interrupt Enable registers determine whether a sensor touch or release causes the interrupt pin to be asserted. Bit 7 - CS8_INT_EN - Enables the interrupt pin to be asserted if a touch is detected on CS8 (associated with the CS8 status bit).
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`0' - The interrupt pin will not be asserted if a touch is detected on CS8 (associated with the CS8 status bit). `1' (default) - The interrupt pin will be asserted a touch is detected on CS8 (associated with the CS8 status bit). Bit 6 - CS7_INT_EN - Enables the interrupt pin to be asserted if a touch is detected on CS7 (associated with the CS7 status bit). Bit 5 - CS6_INT_EN - Enables the interrupt pin to be asserted if a touch is detected on CS6 (associated with the CS6 status bit). Bit 4 - CS5_INT_EN - Enables the interrupt pin to be asserted if a touch is detected on CS5 (associated with the CS5 status bit). Bit 3 - CS4_INT_EN - Enables the interrupt pin to be asserted if a touch is detected on CS4 (associated with the CS4 status bit). Bit 2 - CS3_INT_EN - Enables the interrupt pin to be asserted if a touch is detected on CS3 (associated with the CS3 status bit). Bit 1 - CS2_INT_EN - Enables the interrupt pin to be asserted if a touch is detected on CS2 (associated with the CS2 status bit). Bit 0 - CS1_INT_EN - Enables the interrupt pin to be asserted if a touch is detected on CS1 (associated with the CS1 status bit).
5.13
Repeat Rate Enable Register
Table 5.20 Repeat Rate Enable Register
ADDR 28h
R/W R/W
REGISTER Repeat Rate Enable
B7 CS8_ RPT_EN
B6 CS7_ RPT_EN
B5 CS6_ RPT_EN
B4 CS5_ RPT_EN
B3 CS4_ RPT_EN
B2 CS3_ RPT_EN
B1 CS2_ RPT_EN
B0 CS1_ RPT_EN
DEFAULT FFh
The Repeat Rate Enable register determines the interrupt behavior of the buttons as described in Section 4.6.1. Bit 7 - CS8_RPT_EN - Enables the repeat rate for Capacitive Touch Sensor 8. `0' - The repeat rate for CS8 is disabled. It will only generate an interrupt when a touch is detected and when a release is detected no matter how long the touch is held for. `1' (default) - The repeat rate for CS8 is enabled. In the case of a "touch" event, it will generate an interrupt when a touch is detected and a release is detected. In the case of a "press and hold" event, it will generate an interrupt when a touch is detected and at the repeat rate so long as the touch is held. It will not generate an interrupt when a release is detected. Bit 6 - CS7_RPT_EN - Enables the repeat rate for Capacitive Touch Sensor 7. Bit 5 - CS6_RPT_EN - Enables the repeat rate for Capacitive Touch Sensor 6. Bit 4 - CS5_RPT_EN - Enables the repeat rate for Capacitive Touch Sensor 5. Bit 3 - CS4_RPT_EN - Enables the repeat rate for Capacitive Touch Sensor 4. Bit 2 - CS3_RPT_EN - Enables the repeat rate for Capacitive Touch Sensor 3. Bit 1 - CS2_RPT_EN - Enables the repeat rate for Capacitive Touch Sensor 2. Bit 0 - CS1_RPT_EN - Enables the repeat rate for Capacitive Touch Sensor 1.
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5.14
Multiple Touch Configuration Register
Table 5.21 Multiple Touch Configuration
ADDR 2Ah
R/W R/W
REGISTER Multiple Touch Config
B7 MULT_ BLK_EN
B6 -
B5 -
B4 -
B3
B2
B1 -
B0 -
DEFAULT 80h
B_MULT_T[1:0]
The Multiple Touch Configuration register controls the settings for the multiple touch detection circuitry. These settings determine the number of simultaneous buttons that may be pressed before action is taken. Bit 7 - MULT_BLK_EN - Enables the multiple button blocking circuitry. `0' - The multiple touch circuitry is disabled. The device will not block multiple touches. `1' (default)- The multiple touch circuitry is enabled. The device will accept the number of touches equal to programmed multiple touch threshold and block all others. It will remember which sensor is valid and block all others until that sensor has been released. Bits 3 - 2 - B_MULT_T[1:0] - Determines the number of simultaneous touches on all sensors before a Multiple Touch Event is detected and sensors are blocked. The bit decode is given by Table 5.22.
Table 5.22 B_MULT_T Bit Decode B_MULT_T[1:0] 1 0 0 1 1 0 0 1 0 1 NUMBER OF SIMULTANEOUS TOUCHES 1 (default) 2 3 4
5.15
Recalibration Configuration Register
Table 5.23 Recalibration Configuration Registers
ADDR 2Fh
R/W R/W
REGISTER Recalibration Configuration
B7 BUT_ LD_TH
B6 -
B5 -
B4
B3
B2
B1 CAL_CFG[2:0]
B0
DEFAULT 8Bh
NEG_DELTA_ CNT[1:0]
The Recalibration Configuration register controls the automatic re-calibration routine settings as well as advanced controls to program the Sensor Threshold register settings. Bit 7 - BUT_LD_TH - Enables setting all Sensor Threshold registers by writing to the Sensor 1 Threshold register. `0' - Each Sensor X Threshold register is updated individually. `1' (default) - Writing the Sensor 1 Threshold register will automatically overwrite the Sensor Threshold registers for all sensors (Sensor Threshold 1 through Sensor Threshold 8). The
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individual Sensor X Threshold registers (Sensor 2 Threshold through Sensor 8 Threshold) can be individually updated at any time. Bits 4 - 3 - NEG_DELTA_CNT[1:0] - Determines the number of negative delta counts necessary to trigger a digital re-calibration as shown in Table 5.24.
Table 5.24 NEG_DELTA_CNT Bit Decode NEG_DELTA_CNT[1:0] 1 0 0 1 1 0 0 1 0 1 NUMBER OF CONSECUTIVE NEGATIVE DELTA COUNT VALUES 8 16 (default) 32 None (disabled)
Bits 2 - 0 - CAL_CFG[2:0] - Determines the update time and number of samples of the automatic recalibration routine. The settings applies to all sensors universally (though individual sensors can be configured to support re-calibration - see Section 5.11).
Table 5.25 CAL_CFG Bit Decode CAL_CFG[2:0] 2 0 0 0 0 1 1 1 1 Note 5.1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 RECALIBRATION SAMPLES (SEE Note 5.1) 16 32 64 256 256 256 256 256
UPDATE TIME (SEE Note 5.2) 16 32 64 256 (default) 1024 2048 4096 7936
Recalibration Samples refers to the number of samples that are measured and averaged before the Base Count is updated however does not control the base count update period. Once this target number of update cycles is reached, the device may wait additional time as determined by the Update Time before the base count is updated as determiend by the settings. Update Time refers to the amount of time (in polling cycle periods) that elapses before the Base Count is updated. For those settings that have the Update Time greater than the Recalibration Samples value, the device will wait (and continue to average the updated base count) until the Update Time has elapsed before the base count is updated.
Note 5.2
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5.16
Sensor Threshold Registers
Table 5.26 Sensor Threshold Registers
ADDR 30h 31h 32h 33h 34h 35h 36h 37h
R/W R/W R/W R/W R/W R/W R/W R/W R/W
REGISTER Sensor 1 Threshold Sensor 2 Threshold Sensor 3 Threshold Sensor 4 Threshold Sensor 5 Threshold Sensor 6 Threshold Sensor 7 Threshold Sensor 8 Threshold
B7 -
B6 64 64 64 64 64 64 64 64
B5 32 32 32 32 32 32 32 32
B4 16 16 16 16 16 16 16 16
B3 8 8 8 8 8 8 8 8
B2 4 4 4 4 4 4 4 4
B1 2 2 2 2 2 2 2 2
B0 1 1 1 1 1 1 1 1
DEFAULT 40h 40h 40h 40h 40h 40h 40h 40h
The Sensor Threshold registers store the delta threshold that is used to determine if a touch has been detected. When a touch occurs, the input signal of the corresponding sensor changes due to the capacitance associated with a touch. If the sensor input change exceeds the threshold settings, then a touch is detected. When the BUT_LD_TH bit is set (see Section 5.15 - bit 7), writing data to the Sensor 1 Threshold register will update all of the sensor threshold registers (31h - 37h inclusive).
5.17
Sensor Noise Threshold Registers
Table 5.27 Sensor Noise Threshold Registers
ADDR 38h 39h
R/W R/W R/W
REGISTER Sensor Noise Threshold 1 Sensor Noise Threshold 2
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT 55h 55h
CS4_BN_TH [1:0] CS8_BN_TH [1:0]
CS3_BN_TH [1:0] CS7_BN_TH [1:0]
CS2_BN_TH [1:0] CS6_BN_TH [1:0]
CS1_BN_TH [1:0] CS5_BN_TH [1:0]
The Sensor Noise Threshold registers control the value of a secondary internal threshold to detect noise and improve the automatic recalibration routine. If a Capacitive Touch Sensor output exceeds the Sensor Noise Threshold but does not exceed the sensor threshold, then it is determined to be caused by a noise spike. That sample is not used by the automatic re-calibration routine. The Sensor Noise Threshold is proportional to the programmed threshold as shown in Table 5.28.
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Table 5.28 CSx_BN_TH Bit Decode CSX_BN_TH[1:0] 1 0 0 1 1 0 0 1 0 1 THRESHOLD DIVIDE SETTING 25% 37.5% (default) 50% 62.5%
5.17.1
Sensor Noise Threshold 1 Register
The Sensor Noise Threshold 1 register controls the noise threshold for Capacitive Touch Sensors 1-4. Bits 7-6 - CS4_BN_TH[1:0] - Controls the noise threshold for Capacitive Touch Sensor 4. Bits 5-4 - CS3_BN_TH[1:0] - Controls the noise threshold for Capacitive Touch Sensor 3. Bits 3-2 - CS2_BN_TH[1:0] - Controls the noise threshold for Capacitive Touch Sensor 2. Bits 1-0 - CS1_BN_TH[1:0] - Controls the noise threshold for Capacitive Touch Sensor 1.
5.17.2
Sensor Noise Threshold 2 Register
The Sensor Noise Threshold 2 register controls the noise threshold for Capacitive Touch Sensors 5 - 8. Bits 7-6 - CS8_BN_TH[1:0] - Controls the noise threshold for Capacitive Touch Sensor 8. Bits 5-4 - CS7_BN_TH[1:0] - Controls the noise threshold for Capacitive Touch Sensor 7. Bits 3-2 - CS6_BN_TH[1:0] - Controls the noise threshold for Capacitive Touch Sensor 6. Bits 1-0 - CS5_BN_TH[1:0] - Controls the noise threshold for Capacitive Touch Sensor 5.
5.18
Standby Channel Register
Table 5.29 Standby Channel Register
ADDR 40h
R/W R/W
REGISTER Standby Channel
B7 CS8_ STBY
B6 CS7_ STBY
B5 CS6_ STBY
B4 CS5_ STBY
B3 CS4_ STBY
B2 CS3_ STBY
B1 CS2_ STBY
B0 CS1_ STBY
DEFAULT 00h
The Standby Channel register controls which (if any) Capacitive Touch Sensors are active during Standby. Bit 7 - CS8_STBY - Controls whether the CS8 channel is active in Standby. `0' (default) - The CS8 channel not be sampled during Standby. `1' - The CS8 channel will be sampled during Standby. It will use the Standby threshold setting, and the standby averaging and sensitivity settings. Bit 6 - CS7_STBY - Controls whether the CS7 channel is active in Standby. Bit 5 - CS6_STBY - Controls whether the CS6 channel is active in Standby.
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Bit 4 - CS5_STBY - Controls whether the CS5 channel is active in Standby. Bit 3 - CS4_STBY - Controls whether the CS4 channel is active in Standby. Bit 2 - CS3_STBY - Controls whether the CS3 channel is active in Standby. Bit 1 - CS2_STBY - Controls whether the CS2 channel is active in Standby. Bit 0 - CS1_STBY - Controls whether the CS1 channel is active in Standby.
5.19
Standby Configuration Register
Table 5.30 Standby Configuration Register
ADDR
R/W
REGISTER Standby Configuration
B7 AVG_ SUM
B6
B5
B4
B3
B2 STBY_ SAMP_ TIME
B1
B0
DEFAULT
41h
R/W
-
STBY_AVG[2:0]
STBY_CY_TIME [1:0]
1Dh
The Standby Configuration register controls averaging and cycle time for those sensors that are active in Standby. Bit 7 - AVG_SUM - Determines whether the active sensors will average the programmed number of samples or whether they will accumulate for the programmed number of samples. `0' - (default) - The active sensor delta count values will be based on the average of the programmed number of samples when compared against the threshold. `1' - The active sensor delta count values will be based on the summation of the programmed number of samples when compared against the threshold. Bits 5 - 3 - STBY_AVG[2:0] - Determines the number of samples that are taken for all active channels during the sensor cycle as shown in Table 5.31. All samples are taken consecutively on the same channel before the next channel is sampled and the result is averaged over the number of samples measured before updating the measured results.
Table 5.31 STBY_AVG Bit Decode STBY_AVG[2:0] 2 0 0 0 0 1 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 NUMBER OF SAMPLES TAKEN PER MEASUREMENT 1 2 4 8 (default) 16 32 64 128
Bit 2 - STBY SAMP_TIME - Determines the time to take a single sample when the device is in Standby.
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`0' - The sampling time is ~2.56ms. `1' (default) - The sampling time is ~1.28ms. Bits 1 - 0 - STBY_CY_TIME[2:0] - Determines the overall cycle time for all measured channels during normal operation as shown in Table 5.17. All measured channels are sampled at the beginning of the cycle time. If additional time is remaining, then the device is placed into a lower power state for the remaining duration of the cycle.
Table 5.32 STBY_CY_TIME Bit Decode STBY_CY_TIME[1:0] 1 0 0 1 1 0 0 1 0 1 OVERALL CYCLE TIME 35ms 70ms (default) 105ms 140ms
APPLICATION NOTE: The programmed cycle time is only maintained if the total averaging time for all samples is less than the programmed cycle. The STBY_AVG[2:0] bits will take priority so that if more samples are required than would normally be allowed during the cycle time, the cycle time will be extended as necessary to accommodate the number of samples to be measured.
5.20
Standby Sensitivity Register
Table 5.33 Standby Configuration Register
ADDR 42h
R/W R/W
REGISTER Standby Sensitivity
B7 -
B6 -
B5 -
B4 -
B3 -
B2
B1
B0
DEFAULT 02h
STBY_SENSE[2:0]
The Standby Sensitivity register controls the sensitivity for sensors that are active in Standby. Bits 2 - 0 - STBY_SENSE[2:0] - Controls the sensitivity for sensors that are active in Standby. The sensitivity settings act to scale the relative delta count value higher or lower based on the system parameters. A setting of 000b is the most sensitive while a setting of 111b is the least sensitive. At the more sensitive settings, touches are detected for a smaller delta C corresponding to a "lighter" touch. These settings are more sensitive to noise however and a noisy environment may flag more false touches than higher sensitivity levels. APPLICATION NOTE: A value of 128x is the most sensitive setting available. At the most sensitivity settings, the MSB of the Delta Count register represents 64 out of ~25,000 which corresponds to a touch of approximately 0.25% of the base capacitance (or a C of 25fF from a 10pF base capacitance). Conversely a value of 1x is the least sensitive setting available. At these settings, the MSB of the Delta Count register corresponds to a delta count of 8192 counts out of ~25,000 which corresponds to a touch of approximately 33% of the base capacitance (or a C of 3.33pF from a 10pF base capacitance).
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Table 5.34 STBY_SENSE Bit Decode STBY_SENSE[2:0] 2 0 0 0 0 1 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 SENSITIVITY MULTIPLIER 128x (most sensitive) 64x 32x (default) 16x 8x 4x 2x 1x - (least sensitive)
5.21
Standby Threshold Register
Table 5.35 Standby Threshold Register
ADDR 43h
R/W R/W
REGISTER Standby Threshold
B7 -
B6 64
B5 32
B4 16
B3 8
B2 4
B1 2
B0 1
DEFAULT 40h
The Standby Threshold registers stores the delta threshold that is used to determine if a touch has been detected. When a touch occurs, the input signal of the corresponding sensor changes due to the capacitance associated with a touch. If the sensor input change exceeds the threshold settings, then a touch is detected.
5.22
Sensor Base Count Registers
Table 5.36 Sensor Base Count Registers
ADDR 50h 51h 52h 53h 54h
R/W R R R R R
REGISTER Sensor 1 Base Count Sensor 2 Base Count Sensor 3 Base Count Sensor 4 Base Count Sensor 5 Base Count
B7 128 128 128 128 128
B6 64 64 64 64 64
B5 32 32 32 32 32
B4 16 16 16 16 16
B3 8 8 8 8 8
B2 4 4 4 4 4
B1 2 2 2 2 2
B0 1 1 1 1 1
DEFAULT C8h C8h C8h C8h C8h
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Table 5.36 Sensor Base Count Registers (continued) ADDR 55h 56h 57h R/W R R R REGISTER Sensor 6 Base Count Sensor 7 Base Count Sensor 8 Base Count B7 128 128 128 B6 64 64 64 B5 32 32 32 B4 16 16 16 B3 8 8 8 B2 4 4 4 B1 2 2 2 B0 1 1 1 DEFAULT C8h C8h C8h
The Sensor Base Count registers store the calibrated "Not Touched" input value from the Capacitive Touch Sensor inputs. These registers are periodically updated by the re-calibration routine. The routine uses an internal adder to add the current count value for each reading to the sum of the previous readings until sample size has been reached. At this point, the upper 16 bits are taken and used as the Sensor Base Count. The internal adder is then reset and the re-calibration routine continues. The data presented is determined by the BASE_SHIFT[3:0] bits (see Section 5.5).
5.23
LED Output Type Register
Table 5.37 LED Output Type Register
ADDR 71h
R/W R/W
REGISTER LED Output Type
B7 -
B6 -
B5 -
B4 -
B3 -
B2 -
B1 LED2_ OT
B0 LED1_ OT
DEFAULT 00h
The LED Output Type register controls the type of output for the LED pins. Each pin is controlled by a single bit. Bit 1 - LED2_OT - Determines the output type of the LED2 pin. `0' (default) - The LED2 pin is an open-drain output with an external pull-up resistor. When the appropriate pin is set to the "active" state (logic `1') then the pin will be driven low. Conversely, when the pin is set to the "inactive" state (logic `0', then the pin will be left in a High Z state and pulled high via an external pull-up resistor. `1' - The LED2 pin is a push-pull output. When driving a logic `1' the pin is driven high. When driving a logic `0' the pin is driven low. Bit 0 - LED1_OT - Determines the output type of the LED1 pin.
5.24
Sensor LED Linking Register
Table 5.38 Sensor LED Linking Register
ADDR 72h
R/W R/W
REGISTER Sensor LED Linking
B7 -
B6 -
B5 -
B4 -
B3 -
B2 -
B1 CS2_ LED2
B0 CS1_ LED1
DEFAULT 00h
The Sensor LED Linking registers control whether a Capacitive Touch Sensor is linked to an LED output or not. If the corresponding bit is set, then the appropriate LED output will change states defined by the LED Behavior controls (see Section 5.27) in response to the Capacitive Touch sensor.
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Bit 1 - CS2_LED2 - Links the LED2 output to a detected touch on the CS2 sensor. When a touch is detected, the LED is actuated and will behave as determined by the LED Behavior controls. `0' (default) - The LED 2 output is not associated with a the CS2 input. If a touch is detected on the CS2 input, then the LED will not automatically be actuated. The LED is enabled and controlled via the LED Output Configuration register (see Section 5.24) and the LED Behavior registers (see Section 5.27). `1' - The LED 2 output is associated with the CS2 input. If a touch is detected on the CS2 input then the LED will be actuated and behave as defined in Table 5.43. Bit 0 - CS1_LED1 - Links the LED1 output to a detected touch on the CS1 sensor. When a touch is detected, the LED is actuated and will behave as determined by the LED Behavior controls.
5.25
LED Polarity Register
Table 5.39 LED Polarity Register
ADDR 73h
R/W R/W
REGISTER LED Polarity
B7 -
B6 -
B5 -
B4 -
B3 -
B2 -
B1 LED2_ POL
B0 LED1_ POL
DEFAULT 00h
The LED Polarity registers control the logical polarity of the LED outputs. APPLICATION NOTE: The polarity controls determine the final LED pin drive. A touch on a linked Capacitive Touch Sensor is treated in the same way as the LED Output Control bit being set to a logic `1'. APPLICATION NOTE: For LED operation, the duty cycle settings determine the % of time that the LED pin will be driven to a logic `1' state in a non-inverted system or to a logic `0' state in an inverted system. The duty cycle settings operate independently of the polarity controls. Therefore, the Max Duty Cycle settings define the maximum % of time that the LED pin will be driven high in a non-inverted system while the Min Duty Cycle settings determine the minimum % of time that the LED pin will be driven high in a non-inverted system. The LED drive assumes that the LEDs are configured such that if the LED pin is driven to a logic `0' then the LED will be on and that the CAP1028 LED pin is sinking the LED current. Conversely, if the LED pin is driven to a logic `1' then the LED will be off and there is no current flow. Finally, the breathe operations will always ramp the duty cycle from the minimum duty cycle to the maximum duty cycle and then back down to the minimum duty cycle. The LED Polarity controls lead to two conditions that have the apparent effect of changing the duty cycle settings. If an LED output is non-inverted then the Maximum Duty Cycle settings will define the maximum % of time that the LED is off. Conversely the Minimum Duty Cycle settings will define the minimum % of time that the LED is off. As well, when there is no touch detected or the LED Output Control register bit is at a logic `0' then the LED output will be driven at the minimum duty cycle setting. The relative brightness will then ramp from maximum to minimum and back. If an LED output is inverted, then the Maximum Duty Cycle settings will define the maximum % of time that the LED is on and the Minimum Duty Cycle settings will determine the minimum % of time that the LED is on. As well, when there is no touch detected, or the LED Output Control register bit is at a logic `0', then the LED output will be driven at the minimum duty cycle setting. The relative brightness will then ramp from minimum to maximum and back. Bit 1 - LED2_POL - Determines the polarity of the LED2 output.
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`0' - The LED2 output is inverted. A setting of `1' in the LED Output register will cause the output to be driven to a logic `0' as determined by the LED behavior. Similarly, the duty cycles corresponding to Pulse and Breathe operations will indicate the amount of time that the LED is driven to a logic `0' state (corresponding to "active"). `1' - The LED2 output is non-inverted. A setting of `1' in the LED Output register will cause the output to be driven to a logic `1' or left in the high-z state as determined by its output type and LED behavior. Similarly, the duty cycles corresponding to Pulse and Breathe operations will indicate to the amount of time that the LED is driven to a logic `1' state (corresponding to "inactive"). Bit 0 - LED1_POL - Determines the polarity of the LED1 output.
5.26
LED Output Control Register
Table 5.40 LED Output Control Register
ADDR 74h
R/W R/W
REGISTER LED Output Control
B7 -
B6 -
B5 -
B4 -
B3 -
B2 -
B1 LED2_ DR
B0 LED1_ DR
DEFAULT 00h
The LED Output Control Register controls the output state of the LED pins. All LEDs that are associated with a Capacitive Touch Sensor channel are automatically enabled and will be actuated per the LED Behavior. For those LEDs that are not linked with a Capacitive Touch Sensor channel, then the bit state determines whether the LED is actuated or not actuated. The LED Polarity Control register will determine the non actuated state of the LED pins. Table 5.41 shows the interaction between the polarity controls, output controls and relative brightness.
Table 5.41 LED Polarity Behavior LED OUTPUT CONTROL REGISTER
POLARITY
MAX DUTY maximum % of time that the LED is on (logic 0) maximum % of time that the LED is on (logic 0) maximum % of time that the LED is off (logic 1) maximum % of time that the LED is off (logic 1)
MIN DUTY minimum % of time that the LED is on (logic 0) minimum % of time that the LED is on (logic 0) minimum % of time that the LED is off (logic 1) minimum % of time that the LED is off (logic 1)
LED BEHAVIORS
BRIGHTNESS maximum brightness at minimum duty cycle maximum brightness at max duty cycle. Brightness ramps from min to max maximum brightness at 100 - min duty cycle maximum brightness at 100 - min duty cycle. Brightness ramps from max to min
LED APPEARANCE on at minimum duty cycle according to LED behavior on at 100 - min duty cycle (Note 5.3) according to LED behavior
0
inverted
off
1
inverted
on
0
noninverted noninverted
off
1
on
Note 5.3
For example: when polarity is non-inverted, if min duty cycle is 0, then the LED would be at logic 1 (off) 0% of the time. It will be at logic 0 (on), 100% of the time (100 - min duty cycle).
Bit 1 - LED2_DR - Determines whether LED2 output is driven high or low.
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`0' (default) - The LED2 output is driven at the minimum duty cycle or not actuated. `1' - The LED2 output is High Z or driven at the maximum duty cycle or actuated. Bit 0 - LED1_DR - Determines whether LED1 output is driven high or low.
5.27
LED Behavior Registers
Table 5.42 LED Behavior Registers
ADDR 81h
R/W R/W
REGISTER LED Behavior
B7 -
B6 -
B5 -
B4 -
B3
B2
B1
B0
DEFAULT 00h
LED2_CTL[1:0]
LED1_CTL[1:0]
The LED Behavior registers control the operation of LEDs. Each LED pin is controlled by a 2-bit field and the behavior is determined by whether the LED is linked to a Capacitive Touch Sensor or not. If the corresponding LED output is linked to a Capacitive Touch Sensor than the Start and Stop triggers are used. The defined behavior will activate when the Start Trigger is met and will stop when the Stop Trigger is met. If the LED output is not associated with a a Capacitive Touch Sensor, then the appropriate behavior will be enabled / disabled by the LED Output Control register. If the respective LEDx_DR bit is set to a logic `1' then this will be associated as a "touch" and if the LEDx_DR bit is set to a logic `0' then this will be associated as a "release". The LED Polarity Control register will determine the non actuated state of the LED outputs. If the LED Polarity Control register is set to be inverted (default), then an non actuated LED pin will be driven to a logic `1' state and the LED will be off. If the LED Polarity Control register is set to be non-inverted, then the non actuated LED pin will be driven to the logic '0' state and the LED will be on. APPLICATION NOTE: If an LED is not linked to a Capacitive Touch Sensor and is breathing (via the Breathe or Pulse behaviors), it will finish its current "breath" before any changes to behavior are processed. APPLICATION NOTE: If an LED is not linked to the Capacitive Touch Sensor and configured to operate using Pulse 1 Behavior, then the circuitry will only be actuated when the corresponding bit is set. It will not check the bit condition until the Pulse 1 behavior is finished. The device will not remember if the bit was cleared and reset while it was actuated. APPLICATION NOTE: If an LED is actuated and it is switched from linked to a Capacitive Touch Sensor to unlinked (or vice versa), then the LED will respond to the new command source immediately. For example, if a linked LED was actuated by a touch and the control is changed so that it is unlinked, it will check the status of the corresponding LED Output Control bit. If that bit is `0', then the LED will behave as if a release was detected. LIkewise, if an unlinked LED was actuated by the LED Output Control register and the control is changed so that it is linked and no touch is detected, then the LED will behave as if a release was detected. APPLICATION NOTE: If the period for any breathe operation is changed while the LED is actuated, then the LED output will be reset to 0% drive and any breathing will re-initiate at the new settings. For Pulse 1 and Pulse 2 behaviors, the number of pulses will be retained. Bits 3 - 2 - LED2_CTL[1:0] - Determines the behavior of LED2 as shown in Table 5.43. Bits 1 - 0 - LED1_CTL[1:0] - Determines the behavior of LED1 as shown in Table 5.43.
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Table 5.43 LEDx_CTL Bit Decode LEDX_CTL [1:0] 1 0 OPERATION DESCRIPTION START TRIGGER Touch Detected or LED Control bit set Touch or Release Detected (See Section 5.31) or LED Control bit set Touch Detected or LED Control bit set STOP TRIGGER Release Detected or LED Control bit cleared
0
0
Direct
The LED is driven to the programmed state (active or inactive). See Figure 5.5 The LED will "Pulse" a programmed number of times. During each "Pulse" the LED will breathe up to the maximum brightness and back down to the minimum brightness so that the total "Pulse" period matches the programmed value. The LED will Breathe when the start trigger is detected. When the stop trigger is detected, it will "Pulse" a number of times then return to its minimum brightness. The LED will breathe. It will be driven with a duty cycle that ramps up from the programmed minimum duty cycle (default 0%) to the programmed maximum duty cycle duty cycle (default 100%) and then back down. Each ramp takes up 50% of the programmed period. The total period of each "breath" is determined by the LED Breathe Period controls - see Section 5.30.
0
1
Pulse 1
n/a
1
0
Pulse 2
Release Detected or LED Control bit cleared
1
1
Breathe
Touch Detected or LED Control bit set
Release Detected or LED Control bit cleared
APPLICATION NOTE: The PWM frequency is determined based on the selected LED behavior, the programmed breathe period, and the programmed min and max duty cycles. For the Direct Mode, the PWM frequency is calculated based on the programmed Rise and Fall times. If these are set at 0, then the maximum PWM frequency will be used based on the programmed duty cycle settings.
5.28
LED Pulse 1 Period Register
Table 5.44 LED Pulse 1 Period Register
ADDR 84h
R/W R/W
REGISTER LED Pulse 1 Period
B7 ST_ TRIG
B6 P1_ PER6
B5 P1_ PER5
B4 P1_ PER4
B3 P1_ PER3
B2 P1_ PER2
B1 P1_ PER1
B0 P1_ PER0
DEFAULT 20h
The LED Pulse Period 1 register determines the overall period of a pulse operation as determined by the LED_CTL registers (see Table 5.43 - setting 01b). Each LSB represents 32ms so that a setting of 14h (20d) would represent a period of 640ms. The total range is from 32ms to 4.06 seconds as shown in Table 5.45. APPLICATION NOTE: Due to constraints on the LED Drive PWM operation, any Breathe Period less than 160ms (05h) may not be achievable. The device will breathe at the minimum period possible as determined by the period and min / max duty cycle settings. Bit 7 - ST_TRIG - Determines the start trigger for the LED Pulse behavior.
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8 Channel Capacitive Touch Sensor with 2 LED Drivers Datasheet
`0' (default) - The LED will Pulse when a touch is detected. `1' - The LED will Pulse when a release is detected. The Pulse 1 operation is shown in Figure 5.1 when the LED output is configured for non-inverted polarity and in Figure 5.2 for inverted polarity.
.
Touch Detected or Release Detected X pulses after touch or after release Normal - untouched operation (100% - Pulse 1 Min Duty Cycle) * Brightness Normal - untouched operation
LED Brightness
(100% - Pulse 1 Max Duty Cycle) * Brightness Pulse 1 Period (P1_PER)
Figure 5.1 Pulse Behavior with Non-Inverted Polarity
Touch Detected or Release Detected X pulses after touch or after release Pulse 1 Max Duty Cycle * Brightness
LED Brightness
Normal - untouched operation Pulse 1 Min Duty Cycle * Brightness Pulse Period (P1_PER)
Figure 5.2 Pulse Behavior with Inverted Polarity
Normal - untouched operation
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Table 5.45 LED Pulse / Breathe Period Example SETTING (HEX) 00h 01h 02h 03h 04h ... 7Ch 7Dh 7Eh 7Fh TOTAL BREATHE / PULSE PERIOD (MS) 32 32 64 96 128 ... 3,968 4,000 4,032 4.064
SETTING (DECIMAL) 0 1 2 3 4 ... 124 125 126 127
5.29
LED Pulse 2 Period Register
Table 5.46 LED Pulse 2 Period Register
ADDR 85h
R/W R/W
REGISTER LED Pulse 2 Period
B7 -
B6 P2_ PER6
B5 P2_ PER5
B4 P2_ PER4
B3 P2_ PER3
B2 P2_ PER2
B1 P2_ PER1
B0 P2_ PER0
DEFAULT 14h
The LED Pulse 2 Period register determines the overall period of a pulse operation as determined by the LED_CTL registers (see Table 5.43 - setting 10b). Each LSB represents 32ms so that a setting of 14h (20d) would represent a period of 640ms. The total range is from 32ms to 4.06 seconds (see Table 5.45). APPLICATION NOTE: Due to constraints on the LED Drive PWM operation, any Breathe Period less than 160ms (05h) may not be achievable. The device will breathe at the minimum period possible as determined by the period and min / max duty cycle settings. The Pulse 2 Behavior is shown in Figure 5.3 for non-inverted polarity and in Figure 5.4 for inverted polarity.
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Normal - untouched operation
Touch Detected (100% - Pulse 2 Min Duty Cycle) * Brightness
Release Detected X additional pulses after release Normal - untouched operation
LED Brightness
...
Breathe and Pulse Period (P2_PER)
(100% - Pulse 2 Max Duty Cycle) * Brightness
Figure 5.3 Pulse 2 Behavior with Non-Inverted Polarity
Normal - untouched operation
Touch Detected
Release Detected X additional pulses after release Normal - untouched operation
Pulse 2 Max Duty Cycle * Brightness
LED Brightness
...
Breathe and Pulse Period
Pulse 2 Min Duty Cycle * Brightness
Figure 5.4 Pulse 2 Behavior with Inverted Polarity
5.30
LED Breathe Period Register
Table 5.47 LED Breathe Period Register
ADDR 86h
R/W R/W
REGISTER LED Breathe Period
B7 -
B6 BR_ PER6
B5 BR_ PER5
B4 BR_ PER4
B3 BR_ PER3
B2 BR_ PER2
B1 BR_ PER1
B0 BR_ PER0
DEFAULT 5Dh
The LED Breathe Period register determines the overall period of a breathe operation as determined by the LED_CTL registers (see Table 5.43 - setting 11b). Each LSB represents 32ms so that a setting of 14h (20d) would represent a period of 640ms. The total range is from 32ms to 4.06 seconds (see Table 5.45). APPLICATION NOTE: Due to constraints on the LED Drive PWM operation, any Breathe Period less than 160ms (05h) may not be achievable. The device will breathe at the minimum period possible as determined by the period and min / max duty cycle settings.
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5.31
LED Configuration Register
Table 5.48 LED Configuration Register
ADDR 88h
R/W R/W
REGISTER LED Config
B7 -
B6 RAMP_ ALERT
B5
B4
B3
B2
B1 PULSE1_CNT[2:0]
B0
DEFAULT 04h
PULSE2_CNT[2:0]
The LED Configuration register controls general LED behavior as well as the number of pulses that are sent for the PULSE LED output behavior. Bit 6 - RAMP_ALERT - Determines whether the device will assert the ALERT# pin when LEDs actuated by the LED Output Control register bits have finished their respective behaviors. `0' (default) - The ALERT# pin will not be asserted when LEDs actuated by the LED Output Control register have finished their programmed behaviors. `1' - The ALERT# pin will be asserted whenever any LED that is actuated by the LED Output Control register has finished its programmed behavior. Bits 5 - 3 - PUSLE2_CNT[2:0] - Determines the number of pules used for the Pulse 2 behavior as shown in Table 5.49. Bits 2 - 0 - PULSE1_CNT[2:0] - Determines the number of pulses used for the Pulse 1 behavior as shown in Table 5.49.
Table 5.49 PULSEX_CNT Decode PULSEX_CNT[2:0] 2 0 0 0 0 1 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 NUMBER OF BREATHS 1 (default - Pulse 2) 2 3 4 5 (default - Pulse 1) 6 7 8
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5.32
LED Duty Cycle Registers
Table 5.50 LED Duty Cycle Registers
ADDR 90h 91h 92h 93h
R/W R/W R/W R/W R/W
REGISTER LED Pulse 1 Duty Cycle LED Pulse 2 Duty Cycle LED Breathe Duty Cycle Direct Duty Cycle
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT F0h F0h F0h F0h
P1_MAX_DUTY[3:0] P2_MAX_DUTY[3:0] BR_MAX_DUTY[3:0] DR_MAX_DUTY[3:0]
P1_MIN_DUTY[3:0] P2_MIN_DUTY[3:0] BR_MIN_DUTY[3:0] DR_MIN_DUTY[3:0]
The LED Duty Cycle registers determine the minimum and maximum duty cycle settings used for the LED for each LED behavior. These settings affect the brightness of the LED when it is fully off and fully on. The LED driver duty cycle will ramp up from the minimum duty cycle (see Section 5.32) to the maximum duty cycle and back down again. APPLICATION NOTE: Changes to the Duty Cycle settings will be applied immediately. When the respective register is written, the LED output will be reset to the minimum (or maximum) setting and restarted at the updated settings. APPLICATION NOTE: Upon power on reset (or upon release of the RESET pin), the first breath will breathe from 100% (or 0% duty cycle as determined by the polarity registers) to the programmed minimum (or maximum as determined by the polarity registers) and then proceed normally. APPLICATION NOTE: If the min duty cycle and the max duty cycle are set to the same % then the minimum duty cycle will automatically be changed to the next lower setting. For example, if the maximum duty cycle were set at 1100b (35%) and the minimum duty cycle were set at 1101b (35%), the device will automatically use the minimum value at 1100b (25%). Bits 7 - 4 - X_MAX_DUTY[3:0] - Determines the maximum PWM duty cycle for the LED drivers as shown in Table 5.51 Bits 3 - 0 - X_MIN_DUTY[3:0] - Determines the minimum PWM duty cycle for the LED drivers as shown in Table 5.51.
Table 5.51 LED Duty Cycle Decode X_MAX/MIN_DUTY [3:0] 3 0 0 0 0 0 2 0 0 0 0 1 1 0 0 1 1 0 0 0 1 0 1 0 MAXIMUM DUTY CYCLE 1% 2% 3% 4% 5% MINIMUM DUTY CYCLE 0% 1% 2% 3% 4%
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Table 5.51 LED Duty Cycle Decode (continued) X_MAX/MIN_DUTY [3:0] 3 0 0 0 1 1 1 1 1 1 1 1 2 1 1 1 0 0 0 0 1 1 1 1 1 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 MAXIMUM DUTY CYCLE 6% 7% 9% 11% 14% 18% 25% 35% 50% 70% 100% MINIMUM DUTY CYCLE 5% 6% 7% 9% 11% 14% 18% 25% 35% 50% 70%
5.33
LED Direct Ramp Rates Register
Table 5.52 LED Direct Ramp Rates Register
ADDR 94h
R/W R/W
REGISTER LED Direct Ramp Rates
B7 -
B6 -
B5
B4
B3
B2
B1
B0
DEFAULT 00h
RISE_RATE[2:0]
FALL_RATE[2:0]
The LED Direct Ramp Rates register control the rising and falling edge time of an LED that is configured to operate in Direct mode. The rising edge time corresponds to the amount of time the LED takes to transition from its minimum duty cycle to its maximum duty cycle. Conversely, the falling edge time corresponds to the amount of time that the LED takes to transition from its maximum duty cycle to its minimum duty cycle. Bits 5 - 3 - RISE_RATE[2:0] - Determines the rising edge time of an LED when it transitions from its minimum drive state to its maximum drive state as shown in Table 5.53. Bits 2 - 0 - FALL_RATE[2:0] - Determines the falling edge time of an LED when it transitions from its maximum drive state to its minimum drive state as shown in Table 5.53.
Table 5.53 Rise / Fall Rate and Off Delay Decode RISE_RATE/ FALL_RATE / DIR_OFF_DLY [2:0] 2 0 0 0
SMSC CAP1028
1 0 0 1
0 0 1 0
63
RISE / FALL TIME (TRISE / TFALL), OFF DELAY (TOFF) 0 250ms 500ms
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Table 5.53 Rise / Fall Rate and Off Delay Decode (continued) RISE_RATE/ FALL_RATE / DIR_OFF_DLY [2:0] 2 1 1 1 1 1 1 1 0 0 1 1 0 1 0 1 0 1 RISE / FALL TIME (TRISE / TFALL), OFF DELAY (TOFF) 750ms 1s 1.25s 1.5s 2s
5.34
LED Off Delay Register
Table 5.54 LED Off Delay Register
ADDR 95h
R/W R/W
REGISTER LED Off Delay Register
B7 -
B6 -
B5
B4 -
B3 -
B2
B1
B0
DEFAULT 00h
DIR_OFF_DLY [2:0]
The LED Off Delay register determines the amount of time an LED In Direct Mode remains active after it is no longer actuated (such as after a release has been detected or the drive state has been changed). Bits 2 - 0 - DIR_OFF_DLY[2:0] - Determines the turn-off delay for all LEDs that are configured to operate in Direct Mode as shown in Table 5.53. The Direct Mode operation is determined by the combination of programmed Rise Time, Fall Time, Min and Max Duty cycles, Off Delay, and polarity. Figure 5.5 shows the behavior for Non-Inverted polarity while Figure 5.6 shows the behavior for inverted polarity.
N orm al - untouched operation
Touch Detected
R elease Detected
Norm al - untouched operation
LE D Brightness
(100% - M in D uty Cycle) * Brightness
RISE _RATE Setting (t RISE )
(100% - M ax Duty Cycle) * Brightness
O ff D elay (t OFF _DLY )
FALL_RA TE Setting (t FA LL )
Figure 5.5 Direct Mode Behavior for Non-Inverted Polarity
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Touch D etected
R elease D etected M ax D uty Cycle * B rightness
LE D B rightness N orm al - untouched operation M in D uty C ycle * B rightness R IS E_R A TE Setting (t R IS E )
N orm al - untouched operation
O ff D elay (t O FF_D LY )
FA LL_R A TE S etting (t FA LL )
Figure 5.6 Direct Mode Behavior for Inverted Polarity
5.35
Product ID Register
Table 5.55 Product ID Register
ADDR FDh
R/W R
REGISTER Product ID
B7 0
B6 1
B5 0
B4 0
B3 0
B2 0
B1 1
B0 0
DEFAULT 42h
The Product ID register stores a unique 8-bit value that identifies the device.
5.36
Manufacturer ID Register
Table 5.56 Vendor ID Register
ADDR FEh
R/W R
REGISTER Manufacturer ID
B7 0
B6 1
B5 0
B4 1
B3 1
B2 1
B1 0
B0 1
DEFAULT 5Dh
The Vendor ID register stores an 8-bit value that represents SMSC.
5.37
Revision Register
Table 5.57 Revision Register
ADDR FFh
R/W R
REGISTER Revision
B7 1
B6 0
B5 0
B4 0
B3 0
B2 0
B1 0
B0 1
DEFAULT 81h
The Revision register stores an 8-bit value that represents the part revision.
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Chapter 6 Package Information
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6.1
CAP1028 Package Drawings
66 DATASHEET
SMSC CAP1028
Figure 6.1 20-Pin QFN 4mm x 4mm Package Drawing
8 Channel Capacitive Touch Sensor with 2 LED Drivers Datasheet
Figure 6.2 20-Pin QFN 4mm x 4mm Package Dimensions
Figure 6.3 20-Pin QFN 4mm x 4mm PCB Drawing
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8 Channel Capacitive Touch Sensor with 2 LED Drivers Datasheet
6.2
Package Marking
TOP
0.41 LINE: 1 - SMSC Logo without circled (R) symbol LINE: 2 - Device ID, Version LINE: 3 - Last 7 digits of Lot Number LINE: 4 - Revision and Country Code (RCC) C102 8 -1 123456a RCC e3
PIN 1
3x 0.56
PB-FREE/GREEN SYMBOL (Matte Sn) LINES 1 to 3: CENTER HORIZONTAL ALIGNMENT LINE 4: LEFT HORIZONTAL ALIGNMENT
BOTTOM BOTTOM MARKING NOT ALLOWED
Figure 6.4 CAP1028 Package Markings
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Chapter 7 Revision History
Table 7.1 Customer Revision History REVISION LEVEL & DATE Rev. 1.1 (08-05-09) SECTION/FIGURE/ENTRY Features General Description Chapter 1, Pin Description CORRECTION "TBD" replaced with "3uA" under Low Power Operation Deep sleep drawing "5uA" of current changed to "3uA" Application Note added: "The SPI_CS# pin should be grounded when SMBus, I2C, or BC-Link communications are used." Pin description table updated: Added to pin function description for RESET pin: "This pin contains an internal 50uA pull-down current." Table 2.2, "Electrical Specifications" Table updated: - Current Measurement, ISTBY - changed the typical column to 160, max to 210. Changed the conditions to read: " Standby state active, one sensor monitored, no LED active, default conditions (8 avg, 70ms cycle time)" - Current Measurement, IDSLEEP -changed the TYP column value to 3 and max to 10. - Base Capacitance Line - changed the name to "Maximum Base Capacitance". Removed the value in the MIN column and MAX column. Added 50 in the TYP column. Section 3.1.1, "SMBus (I2C) Communications" The following text deleted: "The SPI_CS# pin is not used and any data presented to this pin will be ignored." and replaced with an application note: "For SMBus/I2C communications, the SPI_CS# pin is not used and should be grounded; any data presented to this pin will be ignored." Section 3.1.3, "BC-Link Communications" The following application note added: "For BC-Link communications, the SPI_CS# pin is not used and should be grounded; any data presented to this pin will be ignored." Modified table heading, "Pull-Down Resistor" by adding "(+/- 5%)" Added note describing limitation on operation
Table 3.1, "ADDR_COMM Pin Decode" Section 5.28, "LED Pulse 1 Period Register", Section Table 5.45, "LED Pulse / Breathe Period Example" and Section 5.30, "LED Breathe Period Register" Table 5.51, "LED Duty Cycle Decode"
Updated table for Min and Max columns
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Table 7.1 Customer Revision History (continued) REVISION LEVEL & DATE SECTION/FIGURE/ENTRY Section 6.2, "Package Marking" Rev. 1.0 (06-16-09) Document title modified; reel size added to ordering information; updates to pinout, general description and register set. Chapter 1, Pin Description Pin tables modified adding SPI to "ALERT# / BC_IRQ#" pin Updated pin description for WAKE/SPI_MOSI pin to identify that it can be an input during Deep Sleep. Table 2.1, "Absolute Maximum Ratings" Section 3.1, "Communications" Table 3.1, "ADDR_COMM Pin Decode" Figure 3.1, "SPI Timing" Section 3.7, "BC-Link Interface" Chapter 4, General Description Section 4.1, "Power States" Figure 4.1, "System Diagram for CAP1028" Section 4.2, "RESET Pin" Section 4.3, "WAKE/SPI_MOSI Pin Operation" Section 4.4, "LED Drivers" Section 4.4, "LED Drivers" Table 5.1, "Register Set in Hexadecimal Order" Rev. 0.56 (5/1/09) General Figure 4.1, "System Diagram for CAP1028" Section 5.5, "Sensitivity Control Register" Section 5.6, "Configuration Register" Table and notes following table modified Updated paragraph to describe proper ADDR_COMM pin function "/I2C" added "SMBus" in "Protocol Used" column Updated figure Removed "8051" from 2nd paragraph Second to last paragraph removed, not needed as clarification follows Removed mention of LED driver outputs Updated system diagram for proper ADDR_COMM pin usage. Changed from pull-up to VDD to pulldown to GND Modified to indicate all communication buses Updated text for wake pin during Deep Sleep CORRECTION Updated package markings per new standards
"Pulse 1" modified Updated text for # of LEDs Updated text and register descriptions for incorrect #'s Cap Sense channels Fixed typos and updated text as necessary. Cleaned up system diagrams Updated figures for pin names Renamed bit fields Renamed bits 5 and 6
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Table 7.1 Customer Revision History (continued) REVISION LEVEL & DATE Rev. 0.53 (4/23/09) Rev. 0.52 (4/17/09) SECTION/FIGURE/ENTRY Section 3.4, "SPI Interface" General CORRECTION Updated section to describe Normal operation Initial document creation
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